2024
- EPIC-Q : Equivalent-Policy Invariant Comparison enhanced transfer Q-learning for run-time SoC performance-power optimization. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation 2024, 2024 mehr… BibTeX
- XCS with dynamic sized experience replay for memory constrained applications. Genetic and Evolutionary Computing Conference (GECCO), 2024 mehr… BibTeX Volltext ( DOI )
- Experiencing Self-Aware MPSoC Run-Time Optimization with Autonomous Bots. SelPhyS 2024, 2024 mehr… BibTeX
- ecoNIC: Saving Energy through SmartNIC-based Load Balancing of Mixed-Critical Ethernet Traffic. 27th Euromicro Conference on Digital System Design (DSD) 2024, 2024 mehr… BibTeX Volltext ( DOI )
- FlexRoute: A Fast, Flexible and Priority-Aware Packet-Processing Design. 32nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP 2024), 2024 mehr… BibTeX Volltext ( DOI )
- FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar. 27th Euromicro Conference on Digital System Design (DSD) 2024, 2024 mehr… BibTeX Volltext ( DOI )
- HW-EPOLL: Hardware-Assisted User Space Event Notification for Epoll Syscall. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation 2024, 2024 mehr… BibTeX
- POSTER: Hardware Assist for Linux IPC on an FPGA Platform. 21st ACM International Conference on Computing Frontiers, 2024 mehr… BibTeX Volltext ( DOI )
- EMDRIVE Architecture: Embedded Computing And Diagnostics From Sensor To Edge. DATE 2024 - Design, Automation and Test in Europe Conference, 2024 mehr… BibTeX
- HASIIL: Hardware-Assisted Scheduling to Improve IPC Latency in Linux. 21st ACM International Conference on Computing Frontiers, 2024 mehr… BibTeX Volltext ( DOI )
2023
- LCT-TL: Learning Classifier Table (LCT) with Transfer Learning for run-time SoC performance-power optimization. 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC 2023), 2023 mehr… BibTeX
- LCT-DER: Learning Classifier Table with Dynamic-sized Experience Replay for run-time SoC performance-power optimization. The Genetic and Evolutionary Computation Conference (GECCO), 2023 mehr… BibTeX Volltext ( DOI )
- Priority-aware Inter-Server Receive Side Scaling. 31st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, 2023 mehr… BibTeX Volltext ( DOI )
- CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs. 36th GI/ITG International Conference on Architecture of Computing Systems, 2023 mehr… BibTeX Volltext ( DOI )
- FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs. 31st IFIP/IEEE Conference on Very Large Scale Integration (VLSI-SoC 2023), 2023 mehr… BibTeX Volltext ( DOI )
- HAWEN: Hardware Accelerator for Thread Wake-Ups in Linux Event Notification. 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023 mehr… BibTeX
- HW-FUTEX: Hardware-Assisted Futex Syscall. IEEE Transactions on Very Large Scale Integration Systems, 2023 mehr… BibTeX Volltext ( DOI )
- X-MAPE: Extending 6G-connected Self-adaptive Systems with Reflexive Actions. 2023 IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN), 2023 mehr… BibTeX
2022
- GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization. Architecture of Computing Systems, 2022 mehr… BibTeX Volltext ( DOI )
- Power-Efficient Invasive Loosely-Coupled MPSoCs. In: Invasive Computing. FAU University Press, Universitätsstraße 4, 91054 Erlangen, 2022 mehr… BibTeX
- Invasive NoCs and Memory Hierarchies for Run-Time Adaptive MPSoCs. In: Invasive Computing. FAU University Press, Universitätsstraße 4, 91054 Erlangen, 2022 mehr… BibTeX Volltext ( DOI )
- Validation and Demonstrator. In: Invasive Computing. FAU University Press, Universitätsstraße 4, 91054 Erlangen, 2022 mehr… BibTeX
- SmartNIC-based Load Management and Network Health Monitoring for Time Sensitive Applications. IEEE/IFIP Network Operations and Management Symposium (NOMS ITAVT Workshop) , 2022 mehr… BibTeX
- GLS Tracing: Gem5-based Low-intrusive Software Tracing. 2022 IEEE Nordic Circuits and Systems Conference (NorCAS), 2022 mehr… BibTeX
- Fine-Grained Power Modeling of Multicore Processors using FFNNs. International Journal of Parallel Programming (IJPP), 2022 mehr… BibTeX
2021
- Exploring a Hybrid Voting-based Eviction Policy for Caches and Sparse Directories on Manycore Architectures. Microprocessors and Microsystems, 2021 mehr… BibTeX
- Poster: Precise Real-Time Monitoring of Time-Critical Flows. The 17th International Conference on emerging Networking EXperiments and Technologies (CoNEXT ’21) , 2021 mehr… BibTeX
- Long Short-Term Memory Neural Network-based Power Forecasting of Multi-Core Processors. 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE) , 2021 mehr… BibTeX
- Protection switching schemes and mapping strategies for fail-operational hard real-time NoCs. Microprocessors and Microsystems 87, 2021 mehr… BibTeX Volltext ( DOI )
- PEPERONI: Pre-Estimating the Performance of Near-Memory Integration. MEMSYS'21: The International Symposium on Memory Systems, 2021 mehr… BibTeX
- Tackling the MPSoC Data Locality Challenge – Part 2 / Chapter 5. In: Multi-Processor System-on-Chip 1. Wiley Online Library, 2021, 87-114 mehr… BibTeX
- Thermal Management and Communication Virtualization for Reliability Optimization in MPSoCs. In: Dependable Embedded Systems . Springer, 2021, pp 181-205 mehr… BibTeX Volltext ( DOI )
2020
- DynaCo: Dynamic Coherence Management for Tiled Manycore Architectures. International Journal of Parallel Programming, 2020 mehr… BibTeX
- HyVE: A Hybrid Voting-based Eviction Policy for Caches. IEEE Nordic Circuits and Systems Conference (NorCAS 2020), 2020 mehr… BibTeX
- Inter-Server RSS: Extending Receive Side Scaling for Inter-Server Workload Distribution. 28th Euromicro International Conference on Parallel, Distributed and Network-based Processing, 2020 mehr… BibTeX
- A Lightweight Nonlinear Methodology to Accurately Model Multi-Core Processor Power. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020 mehr… BibTeX Volltext ( DOI )
- Fine-Grained Power Modeling of Multicore Processors using FFNNs. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XX), 2020 mehr… BibTeX
- Exploring Task and Channel Mapping Strategies in Fail-Operational and Hard Real-Time NoCs. IEEE Nordic Circuits and Systems Conference (NorCAS 2020), 2020 mehr… BibTeX Volltext ( DOI )
- On-Chip Democracy: A Study on the Use of Voting Systems for Computer Cache Memory Management. International Conference on Industrial Engineering and Engineering Management (IEEM), 2020 mehr… BibTeX
- X-CEL: A Method to Estimate Near-Memory Acceleration Potential in Tile-based MPSoCs. ARCS 2020 - 33rd International Conference on Architecture of Computing Systems, 2020 mehr… BibTeX
- DySHARQ: Dynamic Software-Defined Hardware-Managed Queues for Tile-Based Architectures. International Journal of Parallel Programming, 2020 mehr… BibTeX Volltext ( DOI )
- X-Centric: A Survey on Compute-, Memory- and Application-Centric Computer Architectures. MEMSYS'20: The International Symposium on Memory Systems , 2020 mehr… BibTeX
- Machine Learning Approaches for Efficient Design Space Exploration of Application-specific NoCs. ACM Transactions on Design Automation of Electronic Systems (TODAES), 2020 mehr… BibTeX Volltext ( DOI )
2019
- CoD: Coherence-on-Demand - Runtime Adaptable Working Set Coherence for DSM-based Manycore Architectures. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIX) , 2019 mehr… BibTeX
- Cryptographic Hashing in P4 Data Planes. 2nd P4 Workshop in Europe (EUROP4), 2019 mehr… BibTeX
- Multicore Power Estimation using Independent Component Analysis based Modeling. IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (IEEE MCSoC-2019), 2019 mehr… BibTeX
- Channel Mapping Strategies for Effective Protection Switching in Fail-Operational Hard Real-Time NoCs. Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2019 mehr… BibTeX Volltext ( DOI )
- A Hybrid NoC Enabling Fail-Operational and Hard Real-Time Communication in MPSoC. ARCS Konferenz, 2019 mehr… BibTeX Volltext ( DOI )
- APEC: Improved Acknowledgement Prioritization through Erasure Coding in Bufferless NoCs. 13th IEEE/ACM International Symposium on Networks-on-Chip (NOCS 2019), 2019 mehr… BibTeX Volltext ( DOI )
- Network Coding in Networks-on-Chip with Lossy Links. ARCS Konferenz, 2019 mehr… BibTeX
- Multi-Objective Optimization of Channel Mapping for Fail-Operational Hybrid TDM NoCs. 2019 Seventh International Symposium on Computing and Networking (CANDARW), 2019 mehr… BibTeX
- The Information Processing Factory: A Paradigm for Life Cycle Management of Dependable Systems. ESweek, 2019 mehr… BibTeX Volltext ( DOI )
- NEMESYS: Near-Memory Graph Copy Enhanced System-Software. MEMSYS 19: The International Symposium on Memory Systems, 2019 mehr… BibTeX
- SHARQ: Software-Defined Hardware-Managed Queues for Tile-Based Manycore Architectures. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIX), 2019 mehr… BibTeX
- Register Requirement Minimization of Fixed-Depth Pipelines for Streaming Data Applications. 2019 32nd IEEE International System-on-Chip Conference (SOCC), 2019 mehr… BibTeX
2018
- Platform-Centric Self-Awareness as a Key Enabler for Controlling Changes in CPS. IEEE, 2018 Proceedings of the IEEE mehr… BibTeX
- FlueNT10G: A Programmable FPGA-based Network Tester for Multi-10-Gigabit Ethernet. International Conference on Field-Programmable Logic and Applications (FPL), 2018 mehr… BibTeX
- Design methodologies for enabling self-awareness in autonomous systems. 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), IEEE, 2018 mehr… BibTeX
- Self-Aware MPSoC Architecture Extensions for Automotive Applications. In: Organic Computing. Kassel University Press GmbH, 2018 mehr… BibTeX Volltext ( DOI )
- BiSME: A Hardware Coprocessor to Perform Signature Matching at Multi-Gigabit Rates. Application-Specific Systems, Architectures and Processors (ASAP) , 2018 mehr… BibTeX
- Bitmaps & Bitmasks: Efficient Tools to Compress Deterministic Automata. Australian Journal of Telecommunications and the Digital Economy Vol 6 (No 3), 2018 mehr… BibTeX Volltext ( DOI )
- CaCAO: Complex and Compositional Atomic Operations for NoC-based Manycore Platforms. ARCS 2018 - 31st International Conference on Architecture of Computing Systems, 2018 mehr… BibTeX
- Memory Access Pattern Profiling for Streaming Applications Based on MATLAB Models. 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2018 mehr… BibTeX Volltext ( DOI )
2017
- Region Based Cache Coherence for Tiled MPSoCs. 2017 30th IEEE International System-on-Chip Conference (SOCC), 2017 mehr… BibTeX
- Reducing Data Center Resource Over-Provisioning Through Dynamic Load Management for Virtualized Network Functions. International Conference on Architecture of Computing Systems, 2017 mehr… BibTeX Volltext ( DOI )
- Efficient Task Spawning for Shared Memory and Message Passing in Many-core Architectures. Journal of Systems Architecture, 2017 mehr… BibTeX Volltext ( DOI )
- Adaptive Reliability for Fault Tolerant Multicore Systems. Euromicro Conference on Digital System Design (DSD) 2017 , 2017 mehr… BibTeX Volltext ( DOI )
- A Non-Intrusive Spinlock Profiler for Embedded Multicore Systems. DATE, 2017 mehr… BibTeX
- DiaSys: Improving SoC insight through on-chip diagnosis. Journal of Systems Architecture, 2017 mehr… BibTeX Volltext ( DOI )
- A Divide and Conquer State Grouping Method for Bitmap Based Transition. 18th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT’17), 2017 mehr… BibTeX
2016
- Resolving Performance Interference in SR-IOV Setups with PCIe Quality-of-Service Extensions. 2016 Euromicro Conference on Digital System Design (DSD), 2016 mehr… BibTeX
- A Rule-based Methodology for Hardware Configuration Validation in Embedded Systems. 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2016), 2016 mehr… BibTeX
- Estimation of End-to-End Packet Error Rates for NoC Multicasts. Architecture of Computing Systems -- ARCS 2016, Springer International Publishing, 201629th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings mehr… BibTeX Volltext ( DOI )
- What happens on an MPSoC stays on an MPSoC - unfortunately! 2016 International Symposium on Integrated Circuits (ISIC), 2016 mehr… BibTeX Volltext ( DOI )
- DiaSys: On-Chip Trace Analysis for Multi-processor System-on-Chip. Architecture of Computing Systems -- ARCS 2016 (Springer Lecture Notes 9637), Springer International Publishing, 2016, 197-209 mehr… BibTeX Volltext ( DOI ) Volltext (mediaTUM)
- TCU: A Multi-Objective Hardware Thread Mapping Unit for HPC Clusters. International Supercomputing Conference High Performance -- ISC 2016, 2016 mehr… BibTeX
- Dark silicon management: an integrated and coordinated cross-layer approach. it - Information Technology 58 (6), 2016, 297–307 mehr… BibTeX Volltext ( DOI )
- Hardware Acceleration of Signature Matching through Multi Layer Transition Bit Masking. ITNAC 2016, International Telecommunication Networks and Applications Conference, 2016, 226-233 mehr… BibTeX
- MPSoC application resilience by hardware-assisted communication virtualization. Microelectronics Reliability, 2016 mehr… BibTeX Volltext ( DOI )
2015
- A Hardware/Software Approach for Mitigating Performance Interference Effects in Virtualized Environments Using SR-IOV. Cloud Computing (CLOUD), 2015 IEEE 8th International Conference on, 2015 mehr… BibTeX Volltext ( DOI ) Volltext (mediaTUM)
- Denial-of-Service attacks on PCI passthrough devices: Demonstrating the impact on network- and storage-I/O performance. Journal of Systems Architecture 61 (10), 2015, 592 - 599 mehr… BibTeX Volltext ( DOI )
- Position Paper: Towards Hardware-Assisted Decentralized Mapping of Applications for Heterogeneous NoC Architectures. Second International Workshop on Multi-objective Many-core design (MOMAC), 2015 mehr… BibTeX
- Network Interface with Task Spawning Support for NoC-Based DSM Architectures. Architecture of Computing Systems--ARCS 2015, 2015 mehr… BibTeX
- Real-Time Capable CAN to AVB Ethernet Gateway Using Frame Aggregation and Scheduling. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 mehr… BibTeX Volltext (mediaTUM)
- Adaptive multi-layer techniques for increased system dependability. it - Information Technology 57 (3), 2015 mehr… BibTeX Volltext ( DOI )
- Knowledge-Based On-Chip Diagnosis for Multi-Core Systems-on-Chip. edaWorkshop 15, 2015, 39-45 mehr… BibTeX Volltext (mediaTUM)
- Sharer Status-based Caching in tiled Multiprocessor Systems-on-Chip. HPC 2015, 2015 mehr… BibTeX
- A Hardware-based Multi-objective Thread Mapper for Tiled Manycore Architectures. 33rd IEEE International Conference on Computer Design (ICCD), 2015 mehr… BibTeX Volltext ( DOI )
2014
- Performance Isolation Exposure in Virtualized Platforms with PCI Passthrough I/O Sharing. ARCS - Architecture of Computing Systems, 2014 mehr… BibTeX Volltext (mediaTUM)
- System Integration - The Bridge between More than Moore and More Moore Design. Design Automation and Test in Europe (DATE), Friday Workshop on 3D Integration, 2014 mehr… BibTeX
- A Layered Modeling and Simulation Approach to investigate Resource-aware Computing in MPSoCs. Resource awareness and adaptivity in multi-core computing, RACING, First Workshop, 2014 mehr… BibTeX
- Deadline-Aware Interrupt Coalescing in Controller Area Network (CAN). The 11th IEEE International Conference on Embedded Software and Systems, 2014 mehr… BibTeX Volltext ( DOI ) Volltext (mediaTUM)
- A Network Virtualization Approach for Performance Isolation in Controller Area Network (CAN). The 20th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2014 mehr… BibTeX Volltext (mediaTUM)
- A TSV-Property-aware Synthesis Method for Application-Specific 3D-NoCs Design. Design Automation and Test in Europe (DATE), Friday Workshop on 3D Integration, 2014 mehr… BibTeX
- The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure. Proceedings of the first International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS), 2014 mehr… BibTeX
- Network-on-Chip Protection Switching Techniques for Dependable Task Migration on an Open Source MPSoC Platform. edaWorkshop, 2014 mehr… BibTeX
- Dependable Task and Communication Migration in Tiled Manycore System-on-Chip. Forum on Specification & Design Languages (FDL), 2014 mehr… BibTeX
2013
- Potentials and Challenges for Multi-Core Processors in Robotic Applications. Workshop "Roboterkontrollarchitekturen" auf der Informatik 2013, 43. Jahrestagung der Gesellschaft für Informatik, GI-Edition "Lecture Notes in Informatics" (LNI), 2013 mehr… BibTeX
- AUTO-GS: Self-optimization of NoC Traffic Through Hardware Managed Virtual Connections. 16th EUROMICRO Digital System Design (DSD) Conference, 2013 mehr… BibTeX
- Virtualized and Fault-Tolerant Inter-Layer-Links for 3D-ICs. Microprocessors and Microsystems Volume 37 (Issue 8), 2013, pp 823-835 mehr… BibTeX
- Networks-On-Chips für 3D-ICs. 7. ITG/GI/GMM-Fachtagung, 2013 mehr… BibTeX
- Virtual Networks - Distributed Communication Resource Management. In: Transactions on Reconfigurable Technology and Systems (TRETS). ACM, 2013 mehr… BibTeX
- Hardware Supported Adaptive Data Collection for Networks on Chip. IPDPS PhD Forum - 27th IEEE International Symposium on Parallel & Distributed Processing, 2013 mehr… BibTeX
- Open Tiled Manycore System-on-Chip. Lehrstuhl für Integrierte Systeme, 2013, mehr… BibTeX
- HW-OSQM: Reducing the Impact of Event Signaling by Hardware-based Operating System Queue Manipulation. International Conference on Architecture of Computing Systems (ARCS), Springer, 2013, 280-291 mehr… BibTeX
2012
- Multicore Enablement for Automotive Cyber Physical Systems. Special issue of journal "it - Information Technology", 2012 mehr… BibTeX
- Benefits of Selective Packet Discard in Networks-on-Chip. Architecture and Code Optimization (TACO) Volume 9 (Issue 2), 2012, p. 1-21 mehr… BibTeX
- TSV-Virtualization for Multi-Protocol-Interconnect in 3D-ICs. 15th EUROMICRO Conference on Digital System Design (DSD), 2012 mehr… BibTeX
- Enhanced Reliability in Tiled Manycore Architectures through Transparent Task Relocation. 7th Workshop Dependability and Fault Tolerance (VERFE), presented at ARCS, 2012 mehr… BibTeX
- Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS. IEEE International Symposium on Parallel and Distributed Processing Workshops and PhD Forum (IPDPSW), 2012 mehr… BibTeX
- Invasive Manycore Architectures. Proceedings of the 17th Asia and South Pacific Design Automation Conference (ASP-DAC), 2012 mehr… BibTeX
- NEEDS - Nanoelektronik-Entwurf für 3D-Systeme. Zuverlässigkeit und Entwurf, 6. GMM/GI/ITG-Fachtagung (ZuE) , 2012 mehr… BibTeX
- An Integrated Simulation Framework for Invasive Computing. Forum on specification and Design Languages (FDL), 2012 mehr… BibTeX
- System-level Software Performance Simulation Considering Out-of-order Processor Execution. International Symposium on System-on-Chip, 2012 mehr… BibTeX
- A Framework for Open Tiled Manycore System-on-Chip. 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012 mehr… BibTeX
2011
- Hardware Assisted Thread Assignment for RISC based MPSoCs in Invasive Computing. International Symposium on Integrated Circuits (ISIC), 2011 mehr… BibTeX
- Accelerating Collective Communication in Message Passing on Manycore System-on-Chip. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XI), 2011 mehr… BibTeX
2010
- Hardware Support to Exploit Parallelism in Homogeneous and Heterogeneous Multi-Core Systems on Chip. Springer Verlag, 2010 mehr… BibTeX
- Comparison of Deadlock Recovery and Avoidance Mechanisms to approach Message dependent Deadlocks in on-chip Networks. The 4th ACM/IEEE International Symposium on Networks-on-Chip, 2010 mehr… BibTeX
- A Network Interface Card Architecture for I/O Virtualization in Embedded Systems. Second Workshop on I/O Virtualization (WIOV), 2010 mehr… BibTeX
- A Folded Pipeline Network Processor Architecture for 100 Gbit/s Networks. ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), 2010 mehr… BibTeX
- An Application-aware Load Balancing Strategy for Network Processors. International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC), 2010 mehr… BibTeX
2009
- Hierarchical NoCs for Optimized Access to Shared Memory and IO Resources. Euromicro Conference on Digital System Design (DSD), 2009 mehr… BibTeX
- Advanced Packet Segmentation and Buffering Algorithms in Network Processors. 4th International Conference on High Performance and Embedded Architectures and Compilers, 2009 mehr… BibTeX
- FlexPath NP- Flexible, Dynamically Reconfigurable Processing Paths in Network Processors. In: Dynamically Reconfigurable Systems, Architectures, Design, Methods and Applications. Springer, 2009 mehr… BibTeX
- Packet Processing at 100Gbps and Beyond - Challenges and Perspectives. 10. ITG-Fachtagung Photonische Netze, 2009 mehr… BibTeX
2008
- System Level Simulation of Autonomic SoCs with TAPES. Architecture of Computing Systems (ARCS) (Lecture Notes in Computer Science 4934), Springer, 2008, 9-22 mehr… BibTeX Volltext ( DOI )
- Buffer Allocation for Advanced Packet Segmentation in Network Processors. Application-Specific Systems, Architectures and Processors (ASAP), IEEE Press, 2008, 221-226 mehr… BibTeX Volltext ( DOI )
- Improving Memory Subsystem Performance in Network Processors with Smart Packet Segmentation. Embedded Computer Systems: Architectures, Modeling, and Simulation, 20088th International Workshop, SAMOS mehr… BibTeX
- FlexPath NP - A Network Processor Architecture with Flexible Processing Paths. International Symposium on System-on-Chip (SoC), 2008 mehr… BibTeX
- A Hardware Packet Resequencer Unit for Network Processors. Architecture of Computing Systems (ARCS) (Lecture Notes in Computer Science 4934), Springer, 2008, 85-97 mehr… BibTeX Volltext ( DOI )
- A Processing Path Dispatcher in Network Processor MPSoCs. IEEE Transactions on VLSI Systems, IEEE, 2008, 1335-1345 mehr… BibTeX
- SPP1148 Booth: Network Processors. Field Programmable Logic and Applications (FPL), 2008, 352-352 mehr… BibTeX
- Benchmarking Domain Specific Processors: A Case Study of Evaluating A Smart Card Processor Design. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), IEEE Press, 2008, 16-21 mehr… BibTeX Volltext ( DOI )
2007
- Reconfigurable Processing Units vs. Reconfigurable Interconnects. Dagstuhl Seminar on Dynamically Reconfigurable Architectures, 2007 mehr… BibTeX
- Power Estimation of Time Variant SoCs with TAPES. 10th EUROMICRO Conference on Digital System Design: Architectures, Methods, Tools (DSD 07), 2007 mehr… BibTeX
- Accelerating Packet Buffering and Administration in Network Processors. International Symposium on Integrated Circuits (ISIC), 2007 mehr… BibTeX
- A Programmable Stream Processing Engine for Packet Manipulation in Network Processors. IEEE Computer Society Annual Symposium on VLSI, 2007 (ISVLSI '07), 2007 mehr… BibTeX
- A Packet Classification Technique for On-Chip Processing Path Selection. Proceedings of the 5th Workshop on Application Specific Processors (WASP'07), 2007, pp 95-102 mehr… BibTeX
- Simulated and Measured Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. Journal of Systems Architecture Volume 53 (Issue 10), 2007, pp 703-718 mehr… BibTeX Volltext ( DOI )
2006
- Queuing algorithm for speculative Network Processors. International Journal of High Performance Computing and Networking Volume 4 (Issue 5/6), 2006, pp 241-247 mehr… BibTeX
- Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2006), 2006 mehr… BibTeX
- TAPES - Trace-based architecture performance evaluation with SystemC. Design Automation for Embedded Systems Volume 10 (Numbers 2-3, Special Issue on SystemC-based System Modeling, Verification and Synthesis), 2006, pp 157-179 mehr… BibTeX
- Performance Evaluation for System-on-Chip Architectures using Trace-based Transaction Level Simulation. Design Automation & Test in Europe (DATE), 2006 mehr… BibTeX
2005
2004
2003
- Traffic Prediction Algorithm for a Speculative Network Processor. 17th Intl. Symposium for High Performance Computing Systems and Applications HPCS, 2003 mehr… BibTeX
- Consideration of IP-Modules during Mapping and Scheduling of Task Graphs. Austrochip, 2003 mehr… BibTeX
- A Constructive Algorithm with Look-Ahead for Mapping and Scheduling of Task Graphs with Conditional Edges. EuroMicro Symposium on Digital System Design (DSD), 2003 mehr… BibTeX