Yuanji Ye, M.Sc.
Wissenschaftlicher Mitarbeiter
Technische Universität München
TUM School of Computation, Information and Technology
Lehrstuhl für Integrierte Systeme
Arcisstr. 21
80333 München
Tel.: +49.89.289.28338
Fax: +49.89.289.28323
Gebäude: N1 (Theresienstr. 90)
Raum: N2116
Email: yuanji.ye(at)tum.de
Curriculum Vitae
Education
- Since 2024 PhD student at LIS
- 2021 - 2024 Master of Science in Communications and Electronics Engineering (MSCE), TUM
- 2017 - 2021 Bachelor in Electronic Information and Science Technology, University of Electronic Science and Technology of China
Work Experience
- 2023 - 2024 Master Thesis Student, Huawei Munich Research Center
- 2022 - 2023 Working Student, Huawei Munich Research Center
Teaching
Project Lab IC-Design (seit SS 2025)
Research
CeCaS Project - Prefetcher Design
Open Student Work
Ongoing Student Work
Profiling-based Prefetcher Design
Beschreibung
In memory hierarchy, multi-levels caches are used to cache datas in order to avoid the long access latency when accessing to the DRAM. However, when cache misses happen, the long memory access latency will still stall the program execution. To further improve the performance, prefetching techniques are widely used in our modern processors. A prefetcher predict and fetch the data to cache/buffer before it is actually accessed, thereby hiding memory access latency.
Our prefetcher reacts to cache load misses by prefetching large memory regions. While simple, this can severly burden the DRAM bandwidth and flood the buffer, especially when many of those prefetched regions are not actually needed.
Applications exhibit varied memory access patterns. Some memory regions show some characteristics that they are better candidates for prefetching. By profiling an program in advance, it is possible to determine which memory region should be prefetched and which memory region should be evicted earlier.
In this internship, the student will help to implement the prefetching priority and eviction policy in our existing SystemC model. And by using the profiling result in the policy, we expect to get a performance improvement compared to the original model.
Voraussetzungen
- Basic computer architecture knowledge
- Experience with Python programming
- Better if have SystemC knowledge.
Betreuer:
Prefetching Techniques Based on Machine Learning
Beschreibung
Prefetching techniques are widely used in digital systems to enhance performance. A prefetcher predicts and fetches data before it is actually accessed, thereby hiding memory access latency.
Traditional prefetchers typically consider only one program context and work well with regular memory access patterns. Recently, machine learning techniques such as neural networks and reinforcement learning have been employed in prefetcher design. These machine learning based prefetchers take into account more program and system-level information, allowing them to make smarter decisions. As a result, they often achieve higher accuracy, coverage, and timeliness, leading to improved system performance.
The goal of this seminar is to study and compare prefetching mechanisms based on different machine learning methodologies. After reading some papers, you should know the advantages of using machine learning in prefetching, as well as the challenges associated with its implementation. A starting point literature will be provided.
Voraussetzungen
For MSCE/MSEI student
Kontakt
Yuanji Ye
yuanji.ye@tum.de