Florian Maurer, M.Sc.
Wissenschaftlicher Mitarbeiter
Technische Universität München
TUM School of Computation, Information and Technology
Lehrstuhl für Integrierte Systeme
Arcisstr. 21
80290 München
Tel.: +49.89.289.23870
Fax: +49.89.289.28323
Gebäude: N1 (Theresienstr. 90)
Raum: N2117
Email: flo.maurer(at)tum.de
PGP: 4BDA 3220 67D6 86CD C4A9 7CC5 0F74 8369 E8AF 2BFF
Lebenslauf
- Seit November 2018: Doktorand am LIS
- 2018: M.Sc. Elektro- und Informationstechnik, Technische Universität München
Master Thesis: "Hierarchical Control Structure for Autonomic MPSoCs" - 05/2018 - 09/2018: Masterarbeit an der UC Irvine, CA, USA
- 2016: B.Sc. Elektro- und Informationstechnik, Technische Universität München
Bachelor Thesis: "Design, Simulation and Optimization of a Variable Optical Attenuator Driver" - Praktikant / Werkstudent bei:
- DR. JOHANNES HEIDENHAIN GmbH
- Duschl Ingenieure GmbH & Co KG
- Elektrotechnik Pichler
- Tutor für:
- Praktikum Krypto-Implementierung
- Praktikum Elektrotechnik
- MATLAB in Stochastische Signale
Lehre
Project Laboratory IC Design (SS 2019 - SS 2020)
Digitaltechnik (WS 2020/21 - WS 2023/24)
System-on-Chip Solutions & Architecture (WS 2021/22 - WS 2023/24)
Summer School Workshop (WS 2022/23)
Studentische Arbeiten
Verfügbare Arbeiten
Aktuell ausgeführte Arbeiten
Duckietown Bring-Up
Beschreibung
At LIS we want to use the Duckietown hardware and software ecosystem for experimenting with our reinforcement learning based learning classifier tables (LCT) as part of the control system of the Duckiebots: https://www.ce.cit.tum.de/lis/forschung/aktuelle-projekte/duckietown-lab/
More information on Duckietown can be found on https://www.duckietown.org/.
Towards this goal, we need a (followup) working student who is improving the current infrastructure.
Towards this goal, the following three major tasks are necessary:
- Developping an infrastructure to track and visualize measurement data of the platform (e.g. CPU utilization) as well as the executed application.
- During this task also the source and periodicity of already provided data should be analyzed.
- Setting up all Duckiebots incl. all their features and a pipeline to reflash them in case it's needed.
- FPGA-Extension: Searching for a concept, as well as implementing it.
- Final goal: demonstration of data exchange between NVIDIA Jetson and FPGA including protocol to specify the type of transfered data
Kontakt
flo.maurer@tum.de
Betreuer:
Betreute Arbeiten
- VHDL Implementation of Line Segment Detector
(Forschungspraxis, 2024) - Duckietown-Computer Vision Based Measurements for Performance Analysis
(Ingenieurpraxis, Hakan SUNGURLU, 2024) - Development of Obstacle Avoidance Algorithms in Duckietown’s Autonomous Driving Pipeline
(Bachelorarbeit, Elena Kuznetsova, 2024) - Duckietown - Development of Platooning Mode and Adaptive Speed Control in Autonomous Driving
(Bachelorarbeit, Hooman Khosravi, 2024) - Implementation and Evaluation of Safety Mechanisms for Learning Classifier Tables
(Forschungspraxis, Yiming Lu, 2024) - Enabling Task Offloading to FPGAs via DMA Transfers
(Forschungspraxis, Youqing Gao, 2024) - Duckiebot Task Offloading to FPGA - Using Xilinx PCIe DMA IP, Python and Docker
(Forschungspraxis, Daniel Biser, 2024) - Simulation-Based Tuning of a MISO PI Controller for Autonomous Vehicle Applications
(Bachelorarbeit, Hannes Vogel, 2023) - Implementing GPU-Accelerated Lane Detection Algorithm: GPU Performance Slower than CPU in Analysis
(Forschungspraxis, Jiang Shuai, 2023) - Revision of Learning Classifier Tables to Handle Temporarily Unachievable Goals
(Masterarbeit, Michael Meidinger, 2023) - Docker Maintanance for Duckietown
(Werkstudentin, Teodora Ljubevska, 2023) - Improved Line Segment Detection in Duckietown’s Autonomous Driving Pipeline
(Bachelorarbeit, Matthias Schlemmer, 2023) - Implementation of Learning Classifier Tables for Power Reduction in Autonomous Driving Applications
(Bachelorarbeit, Ethan Allan, 2023) - Extending Duckietown Robots Via Learning Classifier Tables: Optimization of Speed in Autonomous Driving
(Bachelorarbeit, Zara Weir, 2023) - Development of a Simulation Model for RL-based Task Scheduling in Simulink
(Bachelorarbeit, Diane Gerber, 2023) - Recognition of Unachievable Goals in Reinforcement Learning
(Forschungspraxis, Michael Meidinger, 2023) - Hardware in the Loop for Reinforcement Learning Investigation
(Bachelorarbeit, Youssef Sharafaldin, 2023) - Reward Function Design for Reinforcement Learning
(Bachelorarbeit, Lara Mehlsam, 2023) - Hardware Implementation of a Hybrid Reinforcement Learning Environment for Development and Demonstration
(Bachelorarbeit, Yiming Lu, 2022) - Developer-Friendly Simulation Environment for Reinforcement Learning-Based MPSoC Runtime Optimization
(Bachelorarbeit, Jakob Hölzl, 2022) - RTEMS on Leon3
(Forschungspraxis, Roberto Ruano Martinez, 2022) - Porting a Learning Classifier Table (LCT) for Processor Optimization from Hardware to Software and Evaluating its Usability
(Forschungspraxis, Moritz Thoma, 2022) - Analysis of Possible DVFS Periodicities in Self-Aware MPSoCs
(Masterarbeit, Thomas Hallermeier, 2022) - Development of a Self-Adaptive RL-Based Task Mapper for MPSoCs with Flexible Optimization Goals
(Masterarbeit, 2022) - Development of a User-Friendly Simulation Environment for RL-Based Optimization of MPSoC Runtime Parameters
(Bachelorarbeit, Eric Christfreund, 2022) - Development of a Multi-Step Reinforcement Learning Approach for Autonomous DVFS on MPSoCs
(Masterarbeit, Lorenz Völk, 2021) - Development of a Cooperative Multi-Agent RL Approach for Autonomous DVFS on MPSoCs
(Masterarbeit, Klajd Zyla, 2021) - Enabling Multi-Core Capabilities in a DVFS Simulation Environment
(Forschungspraxis, 2021) - Application Scheduling on Self-aware Embedded Systems
(Forschungspraxis, Daniel Shkurti, 2021) - Development of a Debugger for a Reinforcement Learning Paradigm on an MPSoC
(Forschungspraxis, Klajd Zyla, 2021) - Development of a SoC Trace Generator on an FPGA for a Trace-Based Simulation Environment
(Bachelorarbeit, Raphael Mayr, 2020) - Implementation of a Self-aware MPSoC Platform for Research on Cross-layer Resource Management
(Werkstudent, Klajd Zyla, 2020) - Design of a Trace-Based DVFS Simulation Environment
(Forschungspraxis, Øivind Bakke, 2020) - Design of a Hardware-Based Debugger for a Self-Aware SoC Paradigm
(Bachelorarbeit, Klajd Zyla, 2019) - Port of a Pedestrian Recognition Software on a VHDL MPSoC
(Werkstudent, Ali Younessi, 2019) - HW-SW Interface Design for a Self-aware SoC Paradigm based on Hardware Machine Learning (IPF)
(Forschungspraxis, Ozan Sahin, 2019)
Ehemalige Seminarthemen
2024 SS
- A Survey on Value- and Rule-Based Reinforcement Learning in Hardware
- Effiziente Belohnungszuweisung im ReinforcementLearning
2023 WS
- Challenges and Chances of Reinforcement Learning in Control Applications
- Typen und Einsatzgebiete von Caches in Praktischen Anwendungen
- A Survey on Types of Caching
- A Survey on Safety Guarantee Mechanisms for the eXtended Classifier System
- Cache Coherency Between Compute Nodes
2023 SS
- Reinforcement Learning in Control Problems
2022 WS
- Exploration the State-of-the-art System Resource Management and Future Direction for Multi-core Systems
2022 SS
- Tools for Software Optimization
- Survey on Model-Based Reinforcement Learning
2021 WS
- Adaptive Embedded Systems based on Learning Classifier Systems
- Evolution of P-state Transition Latencies in Modern x86 CPUs
2021 SS
- Explainable AI: A Collection of Interpretable Machine Learning Approaches and Black-Box Explanation Techniques
- Task and Communication Scheduling Mechanisms on NoC-based Platforms
2020 WS
- Learning Classifier Systems in Multistep Reinforcement Learning Problems
- Markov Decision Processes in the Context of Multi-step Learning
2020 SS
- A Survey on Common MPSoC Simulators
- Survey on Debugging Mechanisms for MPSoCs
- A Qualitative Comparison of Common Benchmark Suits, Using Predefined Hardware Focused Metrics
2019 WS
- Interplay of DVFS and DPM for energy minimization of multicore processors
- Advancements in Learning Classifier Systems
- Architectural Techniques for Runtime Power Optimization on MPSoCs
- A Survey on Machine Learning Techniques Used for Predicting Hard Drive Failures in High Performance Centers
2019 SS
- Comparison of Reinforcement Learning Based Multi Agent System Approaches
- Distributed Reinforcement Learning Approaches
- Power Optimization Methodes for MPSoCs
Publikationen
2024
- EPIC-Q : Equivalent-Policy Invariant Comparison enhanced transfer Q-learning for run-time SoC performance-power optimization. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation 2024, 2024 mehr… BibTeX
- XCS with dynamic sized experience replay for memory constrained applications. Genetic and Evolutionary Computing Conference (GECCO), 2024 mehr… BibTeX Volltext ( DOI )
- Experiencing Self-Aware MPSoC Run-Time Optimization with Autonomous Bots. SelPhyS 2024, 2024 mehr… BibTeX
- QoS-Aware Dynamic Frequency Scaling for Mixed-Critical Systems based on Shielded Reinforcement Learning. 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), IEEE, 2024, 1-6 mehr… BibTeX Volltext ( DOI )
2023
- LCT-TL: Learning Classifier Table (LCT) with Transfer Learning for run-time SoC performance-power optimization. 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC 2023), 2023 mehr… BibTeX
- LCT-DER: Learning Classifier Table with Dynamic-sized Experience Replay for run-time SoC performance-power optimization. The Genetic and Evolutionary Computation Conference (GECCO), 2023 mehr… BibTeX Volltext ( DOI )
- CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs. 36th GI/ITG International Conference on Architecture of Computing Systems, 2023 mehr… BibTeX Volltext ( DOI )
- Machine Learning in Run-Time Control of Multicore Processor Systems. it - Information Technology 0 (0), 2023 mehr… BibTeX Volltext ( DOI )
- Information Processing Factory 2.0 - Self-awareness for Autonomous Collaborative Systems. DATE 2023, 2023 mehr… BibTeX Volltext ( DOI )
2022
- GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization. Architecture of Computing Systems, 2022 mehr… BibTeX Volltext ( DOI )
2020
- The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing. IEEE Transactions on Emerging Topics in Computing, 2020, 1-1 mehr… BibTeX Volltext ( DOI )
- Emergent Control of MPSoC Operation by a Hierarchical Supervisor / Reinforcement Learning Approach. DATE 2020, 2020 mehr… BibTeX Volltext ( DOI )
2019
- SOSA: Self-Optimizing Learning with Self-Adaptive Control for Hierarchical System-on-Chip Management. Proceedings of the 52Nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '52), ACM, 2019 mehr… BibTeX Volltext ( DOI )
- The Information Processing Factory: Organization, Terminology, and Definitions. , 2019 mehr… BibTeX
- The Information Processing Factory: A Paradigm for Life Cycle Management of Dependable Systems. ESweek, 2019 mehr… BibTeX Volltext ( DOI )