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Technische Universität München

System-on-Chip Technologies

Lecturer (assistant)
Zafer Attal [L]
Andreas Herkersdorf
Thomas Wild
Shichen Huang
Walter Stechele
Duration 3 SWS
Term Wintersemester 2024/25
Language of instruction English

Admission information

See TUMonline
Note: Registration starting on 24.09.2024

Objectives

The objective of this course is to impart a general understanding of the structure and operation of systems-on-chip. Main building blocks of a system-on-chip, e.g. processor, on-/off-chip memories, interconnect are introduced. Implementation methods as well as techniques for low power consumption are addressed.

Description

This course provides basics, current trends and challenges in the development of digital system-on-chip (SoC). We start with the main steps for building arbitrary CMOS-based combinatorial logic and sequential digital data processing and control circuitry (e.g. Finite State Machines) and explaining their role and significance in the scope of key system-on-chip components: microprocessors, memories and interconnects. The microarchitectural structure and building blocks of processor elements (RISC cores), on-/off-chip memory technology (SRAM, DRAM, Flash), bus and point-to-point interconnect standards (Processor Local Bus, Advanced Microcontroller Bus Architecture, FIFO) as well as the design of communications specific arithmetic blocks (adder, multipliers, shift and comparators) will be introduced and analyzed. Finally, we will introduce main implementation methods for SoCs, such as FPGA, standard cell and full custom design, and discuss methods for low power design, which is vital for the development of SoCs in embedded systems.

Prerequisites

Bachelor courses on semiconductor devices and digital circuits, basics in computer architecture

Teaching and learning methods

The lecture is structured into a presentation and an associated tutorial.
The lectures and exercises are given in presence. All materials will be made available via a Moodle course.

Examination

Written final examination
Registration for exam (TUMonline) from 18 November 2024 to 15th January 2024
Exam probably on 24th Feburary 2025.

Recommended literature

- J. Hennessy, "Computer Architecture. A Quantitative Approach", Elsevier
- J. Rabaey, "Digital Integrated Circuits", Prentice Hall
- N. Weste, K. Eshraghian, "Principles of CMOS VLSI Design", Addison Wesley

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