Michael Meidinger, M.Sc.
Research Associate
Technical University of Munich
TUM School of Computation, Information and Technology
Chair of Integrated Systems
Arcisstr. 21
80333 München
Germany
Phone: +49.89.289.23871
Fax: +49.89.289.28323
Building: N1 (Theresienstr. 90)
Room: N2114
Email: michael.meidinger@tum.de
Curriculum vitae
- Since 2023: Doctoral Candidate at LIS
- 2021 - 2023: M.Sc. Electrical Engineering and Information Technology, Technical University of Munich
- 2018 - 2021: B.Sc. Electrical Engineering and Information Technology, Technical University of Munich
- Tutor/semester break course Digitaltechnik (2019 - 2023), working student at ASC Sensors (2020 - 2022)
Ongoing Theses
High-Speed Interconnect with Compute Express Link
Description
The Compute Express Link (CXL) standard provides a high-performance interconnect between processors, memories, and accelerators. As an essential part of the Universal Chiplet Interconnect Express (UCIe) standard's protocol layer, it might become critical for advancements in chiplet-based architecture design. With high bandwidth, low latency, and coherence mechanisms, it is supposed to improve upon its PCIe foundation for applications with high requirements.
This seminar work should investigate how CXL and especially its three protocols (CXL.io, CXL.memory, CXL.cache) operate, how they compare to the PCIe baseline, and what a developer has to consider when employing CXL for a classical system-on-chip or a chiplet-based system.
Starting points for literature research could be the following papers:
https://ieeexplore.ieee.org/abstract/document/9912551
https://dl.acm.org/doi/abs/10.1145/3538643.3539745
https://dl.acm.org/doi/abs/10.1145/3624062.3624175
Contact
michael.meidinger@tum.de
Supervisor:
Duckietown - Lane Following with Platooning
Description
At LIS, we want to use the Duckietown hardware and software ecosystem to experiment with our reinforcement learning-based learning classifier tables (LCT) as part of the control system of the Duckiebots: https://www.ce.cit.tum.de/lis/forschung/aktuelle-projekte/duckietown-lab/.
More information on Duckietown can be found at https://www.duckietown.org/.
In this student work, we want to extend the bot's current abilities (lane following).
The goal of this work is to enable the bots to follow each other with a constant distance.
At the end, there should be a seamless integration in the Lane Following Pipeline.
Prerequisites
- Knowledge about Image Processing
- Python
Contact
flo.maurer@tum.de
michael.meidinger@tum.de
Supervisor:
Duckietown - Lane Detection with Obstacle Avoidance and Intersection Recognition
Description
At LIS, we want to use the Duckietown hardware and software ecosystem to experiment with our reinforcement learning-based learning classifier tables (LCT) as part of the control system of the Duckiebots: https://www.ce.cit.tum.de/lis/forschung/aktuelle-projekte/duckietown-lab/.
More information on Duckietown can be found at https://www.duckietown.org/.
In this student work, we want to extend the bot's current abilities (lane following).
The goal of this work is to enable the bots to avoid obstacles on the road (e.g. ducks, other bots, ...) and to stop at intersections (red lines) for a predefined time.
At the end, there should be a seamless integration in the Lane Following Pipeline.
Prerequisites
- Knowledge about Image Processing
- Python
Contact
flo.maurer@tum.de
michael.meidinger@tum.de
Supervisor:
Chiplet-Based Architecture Design
Description
Chiplet-based architectures are starting to become available, notably with the release of Intel’s Meteor Lake consumer CPUs at the end of last year. Even though most major players in the field are pursuing this strategy, there seems not to be a clear consensus yet on aspects like the chiplet-to-chiplet interconnect. The Universal Chiplet Interconnect Express (UCIe) standard appears to be a promising approach, but others are being developed, for example Bunch-of-Wires (BOW). In this seminar work, literature on chiplets should be investigated, specifically on topics as die-to-die interconnect or further challenges in the design of chiplet architectures.
Starting points for literature research could be the following papers:
https://ieeexplore.ieee.org/abstract/document/8416868
https://ieeexplore.ieee.org/abstract/document/9174651
https://ieeexplore.ieee.org/abstract/document/9893865
Contact
michael.meidinger@tum.de
Supervisor:
Duckietown - Image Processing on FPGAs
Description
At LIS we want to use the Duckietown hardware and software ecosystem for experimenting with our reinforcement learning based learning classifier tables (LCT) as part of the control system of the Duckiebots: https://www.ce.cit.tum.de/lis/forschung/aktuelle-projekte/duckietown-lab/
More information on Duckietown can be found on https://www.duckietown.org/.
In this student work, we want to enable the use of the FPGA in the Lane Detection.
Previous work already experimented with the communication between NVIDIA Jetson and the FPGA via a DMA.
Goal of this work is to port the LSD to FPGA to benefit from offloading parts of the Lane Detection Alogithm from the CPU and execute them accelerated on the FPGA.
At the end, there should be a seamless integration in the Lane Following Pipeline.
Prerequisites
- Knowledge about Image Processing
- Lots of FPGA experience
- VHDL
- Python
Contact
flo.maurer@tum.de
michael.meidinger@tum.de
Supervisor:
Development of a Packet Forwarding Application in RTEMS
Description
In our IPF project, we optimize application execution during runtime by using self-aware DVFS and task mapping algorithms.
For "real-world" testing, we need a packet forwarding application running on our SparcV8 processors. This application should periodically generate and process packets and provide metrics such as "generation time", "scheduling time" and "deadline".
It should also be possible to discard packets if the deadline is exceeded.
It is planned to implement this application within RTEMS.
Prerequisites
- Experience in low-level programming (registers, timers, etc)
- Experience with real time operating systems
- Strong problem-solving skills, attention to detail, and the ability to work both independently and collaboratively in a team environment
Contact
michael.meidinger@tum.de
flo.maurer@tum.de