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Marco Liess, M.Sc.
Research Associate
Technical University of Munich
TUM School of Computation, Information and Technology
Chair of Integrated Systems
Arcisstr. 21
80333 München
Germany
Tel.: +49.89.289.23873
Fax: +49.89.289.28323
Gebäude: N1 (Theresienstr. 90)
Raum: N2139
Email: marco.liess(at)tum.de
Curriculum Vitae
- 2022 - today: PhD student at LIS, TU Munich
- 2019 - 2021: Master of Science in Electrical and Computer Engineering at TU Munich
- Major: Embedded and Control Systems
- Working Student on Microcontroller Security at the Fraunhofer Institute for Applied and Integrated Security (AISEC)
- Thesis: "Frame Synchronization for Satellite-based IoT Applications" at the German Aerospace Center (DLR)
- 2016 - 2019: Bachelor of Science in Electrical and Computer Engineering at TU Munich
- Focus on Computer Networks, Embedded Systems and Security
- Thesis: "Efficient Key Establishment for IoT Applications" at Fraunhofer (AISEC)
Research Interests
I am researching on hardware aspects of network interfaces and the attached processing resources. This includes the acceleration of the data paths from network interface to processor, the mitigation of memory bottlenecks, dynamic power management, efficient hash algorithms and lookup mechanisms and much more.
Teaching
Chip Multicore Processors (since SS 2024)
(Seminar Integrierte Systeme WS 2022/23 until WS2023/24)
(Seminar on Topics in Integrated Systems WS 2022/23 until WS2023/24)
If I'm currently not offering any work or the topics are not what you're looking for, feel free to contact me directly anyways!
Ongoing Work
Software Implementation of SmartNIC-assisted Load Balancing
Description
With the advent of research on the next generation of
mobile communications 6G, we are engaged in exploring
architecture extensions for Smart Network Interface Cards
(SmartNICs). To enable adaptive, energy-efficient and
low-latency network interfaces, we are prototyping a
custom packet processing pipeline on FPGA-based NICs,
partially based on the open-nic project
(https://github.com/Xilinx/open-nic).
Load balancing is a challenging task in modern data
centers and servers, as the number of processing cores rises (96 cores in recent AMD Epyc platforms) and the packet processing workload should be distributed equally among them. To assist this process, incoming packet flows should be differentiated and assigned to different queues already in the NIC hardware. These queues must then be pinned to different processor cores to ensure the hardware load-balancing algorithm works correctly. Further, interrupts and other sources of imbalances necessitate a feedback mechanism, to ensure the current capacity of individual cores is taken into account.
The goal of this work is to implement the required software driver and runtime extensions to an existing SmartNIC-based load balancing mechanism. In detail, this includes configuring the NIC driver to use the correct queues, pinning the processing of the queues onto different CPU cores and creating a feedback mechanism to the load balancer in the SmartNIC. Further, functional verification as well as performance evaluation should be done on the system.
Prerequisites
- Programming skills in C (and Python)
- Practical experience with Operating Systems (Linux) and drivers
- Good Knowledge of computer networks, OSI layer model and protocols
- Comfortable with the Linux command line and bash
Contact
Marco Liess, M. Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
An Overview of Service Migration in Modern Edge Computer Networks
Description
In modern Edge computer networks, applications and services should adhere to service-level agreements (SLA) like low latency or minimal throughput. Depending on demand and resource availability, these services have to be migrated between compute nodes to ensure these SLAs.
Service migration is a critical aspect of Edge computing, enabling the movement of services closer to the data source or end-users for improved performance and reduced latency. However, it comes with its own set of challenges, such as maintaining service continuity and managing resource constraints. This involves checkpointing and restarting of the applications (potentially in containers), as well as moving the data from one compute node to the other. This data movement could be further improved with RDMA technology.
This seminar should provide a background overview of the required technologies for service migration and explore recent improvements for low-latency service migration in both hardware and software.
These papers are an interesting starting point for your literature research:
- https://ieeexplore-ieee-org.eaccess.tum.edu/abstract/document/10643902
- https://www.usenix.org/conference/atc21/presentation/planeta
Contact
marco.liess@tum.de
Supervisor:
An Overview of Service Migration in Modern Edge Computer Networks
Description
In modern Edge computer networks, applications and services should adhere to service-level agreements (SLA) like low latency or minimal throughput. Depending on demand and resource availability, these services have to be migrated between compute nodes to ensure these SLAs.
Service migration is a critical aspect of Edge computing, enabling the movement of services closer to the data source or end-users for improved performance and reduced latency. However, it comes with its own set of challenges, such as maintaining service continuity and managing resource constraints. This involves checkpointing and restarting of the applications (potentially in containers), as well as moving the data from one compute node to the other. This data movement could be further improved with RDMA technology.
This seminar should provide a background overview of the required technologies for service migration and explore recent improvements for low-latency service migration in both hardware and software.
Contact
marco.liess@tum.de
Supervisor:
Completed Work
2024
Bachelor's Theses
-
30.10.2024 Ida Kastlunger
Webserver Setup for Benchmarking of a SmartNIC-Assisted Server
Supervisor:Marco Liess -
02.10.2024
Hardware Interrupt Generation for Smart Servers
Supervisor:Marco Liess
Master's Theses
-
12.09.2024
Unlocking Power Saving Potential: Evaluating and Enhancing Idle-Governor Strategies
Supervisor:Marco Liess, Hagen Pfeifer (Rohde & Schwarz) -
28.06.2024
Multicore-Optimierung eines bildverarbeitenden Systems
Supervisor:Marco Liess -
24.05.2024 Vu Thien Quang Phan
SmartNIC Enhancements for Network Node Resilience
Supervisor:Marco Liess
Research Internships (Forschungspraxis)
-
12.11.2024 Changfeng Xie
FPGA-based Network Tester for 100 Gbps
Supervisor:Marco Liess -
14.03.2024
Bring-up and Evaluation of DPDK Network Driver for FPGA-based Networking
Supervisor:Marco Liess -
09.02.2024
Porting of Load Balancing Mechanism to 100 Gbps SmartNICs
Supervisor:Marco Liess
Seminars
-
09.07.2024
Exploring Linux eBPF Mechanism for SmartNICs
Supervisor:Marco Liess -
01.02.2024
Innovations in Silicon Photonics for On-Chip Interconnects
Supervisor:Marco Liess -
01.02.2024
Power Management Approaches for Network Processing Nodes
Supervisor:Marco Liess -
25.01.2024
Power Management for Network Packet Processing
Supervisor:Marco Liess
Student Assistant Jobs
-
31.08.2024
Implementation and Evaulation of Hardware Match-Action Tables on FPGA
Supervisor:Marco Liess
Interdisciplinary Projects
-
13.03.2024
Exploring Power Management of AMD Processors in Linux
Supervisor:Marco Liess
2023
Research Internships (Forschungspraxis)
-
30.06.2023
Implementation of HDL Design for Packet Processing with 10 Gbps Breakout Capabilities
Supervisor:Marco Liess
Seminars
-
08.02.2023
Tackling the Memory Bottleneck in Network Processing
Supervisor:Marco Liess -
08.02.2023
CPU Bypassing for Faster Network Processing
Supervisor:Marco Liess -
27.01.2023
Different Approaches of Memory Architecture in Network Hardware
Supervisor:Marco Liess -
27.01.2023
CPU Bypassing for Faster Network Processing
Supervisor:Marco Liess
Student Assistant Jobs
-
30.09.2023
Bring-up and Evaluation of FPGA Network Accelerator Boards
Supervisor:Marco Liess
2022
Seminars
-
20.07.2022
A Survey on Network Traffic Prediction for Power Management
Supervisor:Marco Liess
Publications
- Reflex-based Wire-rate Traffic Steering and Dynamic Service Relocation in Smart Edge Network Interface Cards (SENIC). International Conference on Mobile and Miniaturized Terahertz Systems (ICM2TS), 2025 more… BibTeX
- FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar. 27th Euromicro Conference on Digital System Design (DSD) 2024, 2024 more… BibTeX Full text ( DOI )
- ecoNIC: Saving Energy through SmartNIC-based Load Balancing of Mixed-Critical Ethernet Traffic. 27th Euromicro Conference on Digital System Design (DSD) 2024, 2024 more… BibTeX Full text ( DOI )
- FlexRoute: A Fast, Flexible and Priority-Aware Packet-Processing Design. 32nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP 2024), 2024 more… BibTeX Full text ( DOI )
- FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs. 31st IFIP/IEEE Conference on Very Large Scale Integration (VLSI-SoC 2023), 2023 more… BibTeX Full text ( DOI )
- X-MAPE: Extending 6G-connected Self-adaptive Systems with Reflexive Actions. 2023 IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN), 2023 more… BibTeX
- Frame Synchronization Algorithms for Satellite Internet of Things Scenarios. 2022 11th Advanced Satellite Multimedia Systems Conference and the 17th Signal Processing for Space Communications Workshop (ASMS/SPSC), 2022 more… BibTeX Full text ( DOI )