Klajd Zyla, M.Sc.
Research Associate
Technical University of Munich
TUM School of Computation, Information and Technology
Chair of Integrated Systems
Arcisstr. 21
80333 München
Germany
Tel.: +49.89.289.28560
Fax: +49.89.289.28323
Building: N1 (Theresienstr. 90)
Room: N2118
Email: klajd.zyla(at)tum.de
Curriculum Vitae
- Since January 2022: Doctoral Candidate at LIS
- 2019-2021: M.Sc. Electrical and Computer Engineering, TU Munich
Area of specialization: Embedded and Computer Systems
Master Thesis: Development of a Cooperative Multi-Agent RL Approach for Autonomous DVFS on MPSoCs - 2016-2019: B.Sc. Electrical and Computer Engineering, TU Munich
Bachelor Thesis: Design of a Hardware-Based Debugger for a Self-Aware SoC Paradigm - Working student at LIS, INOVA Semiconductors GmbH and Dräxlmaier Group
- Tutor for Electricity and Magnetism, Electromagnetic Field Theory
Research
My research focus lies in the development of architectures and methods for flexible and fast processing of data packets in high-performance SmartNICs. Important aspects in this context are the exploration of on-chip interconnects, the scheduling of packets with different priorities and the acceleration of transport protocols, such as RDMA (remote direct memory access).
Bachelor's Theses
Supervisor:
Klajd Zyla
Student
Nour Abouelkheir
Supervisor:
Klajd Zyla
Student
Amna Bouzaida
Research Internships (Forschungspraxis)
Supervisor:
Klajd Zyla
Student
Aleksa Stojkovic
Supervisor:
Klajd Zyla
Student
Antra Pramanik
Supervisor:
Klajd Zyla
Student
Kejdi Guzi
Seminars
Supervisor:
Klajd Zyla
Student
Arathi Anitha
Supervisor:
Klajd Zyla
Student
Aleksa Stojkovic
Contact
klajd.zyla@tum.de
Supervisor:
Klajd Zyla
Student
Kejdi Guzi
2025
2024
- FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar. 2024 27th Euromicro Conference on Digital System Design (DSD), 2024 more… BibTeX Full text ( DOI )
- FlexRoute: A Fast, Flexible and Priority-Aware Packet-Processing Design. 2024 32nd Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), 2024 more… BibTeX Full text ( DOI )
2023
- CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs. 36th International Conference on Architecture of Computing Systems, ARCS 2023, 2023 more… BibTeX Full text ( DOI )
- FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs. 2023 IFIP/IEEE 31st Conference on Very Large Scale Integration (VLSI-SoC), 2023 more… BibTeX Full text ( DOI )