Circuit Design for Security
Lecturer: Michael Pehl (L), Niklas Stein
| Number | 0000005198 |
|---|---|
| Type | lecture |
| Duration | 2 SWS |
| Term | Sommersemester 2026 |
| Language of instruction | English |
| Position within curricula | See TUMonline |
| Dates | See TUMonline |
- 13.04.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 15.04.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 20.04.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 22.04.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 27.04.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 04.05.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 06.05.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 11.05.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 13.05.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 18.05.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 20.05.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 27.05.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 01.06.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 03.06.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 08.06.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 10.06.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 15.06.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 17.06.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 22.06.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 24.06.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 29.06.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 01.07.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 06.07.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 08.07.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 13.07.2026 11:30-13:00 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 15.07.2026 15:00-16:30 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
Admission information
Objectives
After successfully completing this module, students will be able to implement fundamental mathematical concepts of cryptography, such as arithmetic in finite fields or operations on elliptic curves, in hardware. They will be able to evaluate relevant algorithms regarding the potential security and efficiency of the implementation in the context of various target applications. Students can assess the problems of side-channel attacks, fault injection attacks, and typical security vulnerabilities that occur in the hardware implementations discussed and can name countermeasures. In addition, students understand the importance of randomness in secure implementation and can outline the structure and concept of true and deterministic random number generators using examples. Students understand the evaluation criteria for random number generators and can apply the appropriate tools.
Description
This module begins by reviewing mathematical fundamentals such as arithmetic on finite fields and operations on elliptic curves, and discusses the problems involved in implementing such algorithms in hardware. Building on this, algorithms for typical problems such as modulo addition, modulo multiplication (especially with regard to large numbers and special reduction polynomials), and inversion (finding the multiplicative inverse element) in finite fields are considered, and their efficient implementation and feasibility in hardware are discussed. In addition, potential points of attack on the discussed algorithms are discussed, and countermeasures are presented, including the general concept of side-channel analysis and fault injection attacks, as well as countermeasures (e.g., masking). Attacks on typical hardware components, such as scan chains or finite state machines, are also discussed.
Since high-quality random numbers also play a crucial role in secure implementations, the module also considers the implementation of physical and deterministic random number generators. Starting with linear feedback shift registers, their applications, and weaknesses, deterministic random number generators are first introduced before the concept of physical random number generators is developed, particularly using the case study of an oscillator-based random number generator. In this context, the statistical evaluation, modeling, and post-processing of randomness are also discussed.
Since high-quality random numbers also play a crucial role in secure implementations, the module also considers the implementation of physical and deterministic random number generators. Starting with linear feedback shift registers, their applications, and weaknesses, deterministic random number generators are first introduced before the concept of physical random number generators is developed, particularly using the case study of an oscillator-based random number generator. In this context, the statistical evaluation, modeling, and post-processing of randomness are also discussed.
Prerequisites
- Digital Design
- VHDL or Verilog
- Good mathematical skills
- VHDL or Verilog
- Good mathematical skills
Examination
see module description
Recommended literature
Debdeep Mukhopadhyay and Rajat Subhra Chakraborty. 2014. Hardware Security: Design, Threats, and Safeguards (1st. ed.). Chapman & Hall/CRC.
Further literature recommendations will be provided at the beginning of each semester through the Moodle course.
Further literature recommendations will be provided at the beginning of each semester through the Moodle course.