- A Concise, Architecture-Focused ASIP Modeling Approach for Instruction Set Simulators. Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV), 2024 more… BibTeX
- Towards Coverage Analysis for Translating Instruction Set Simulators. RISC-V Summit Europe, 2024 more… BibTeXWWW
- Effective Processor Model Generation from Instruction Set Simulator to Hardware Design. 2023 IEEE Nordic Circuits and Systems Conference (NorCAS), IEEE, 2023 more… BibTeX Full text ( DOI )
- Automated Generation of a RISC-V LLVM Toolchain for Custom MACs. RISC-V Summit Europe, 2023 more… BibTeXWWW
- A Flexible Simulation Environment for RISC-V. RISC-V Summit Europe, 2023 more… BibTeXWWW
- The Scale4Edge RISC-V Ecosystem. Design, Automation and Test in Europe (DATE), 2022 more… BibTeX
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M.Sc. Karsten Emrich
Technical University of Munich
Chair of Electronic Design Automation (Prof. Schlichtmann)
Postal address
Postal:
Arcisstr. 21
80333 München
- Phone: (work pref) +49 (89) 289 - 23642
- Office hours: nach Vereinbarung
- Room: 0509.05.913
- karsten.emrich@tum.de