- CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design. Design, Automation and Test in Europe (DATE), 2025 more… BibTeX Full text ( DOI ) Full text (mediaTUM) WWW
- CorrectNet+: Dealing with HW Non-Idealities in In-Memory-Computing Platforms by Error Suppression and Compensation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024 more… BibTeX Full text ( DOI )
- Automated C/C++ Program Repair for High-Level Synthesis via Large Language Models. Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, ACM, 2024, 1-9 more… BibTeX Full text ( DOI )
- Computational and Storage Efficient Quadratic Neurons for Deep Neural Networks. Design, Automation and Test in Europe (DATE), 2024 more… BibTeX
- A FeFET-based Time-Domain Associative Memory for Multi-bit Similarity Computation. Design, Automation and Test in Europe (DATE), 2024 more… BibTeX
- ScanCamouflage: Obfuscating Scan Chains with Camouflaged Sequential and Logic Gates. Design, Automation and Test in Europe (DATE), 2024 more… BibTeX
- OplixNet: Towards Area-Efficient Optical Split-Complex Networks with Real-to-Complex Data Assignment and Knowledge Distillation. Design, Automation and Test in Europe (DATE), 2024 more… BibTeX
- Logic Design of Neural Networks for High-Throughput and Low-Power Applications. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2024 more… BibTeX
- AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design. ACM/IEEE International Symposium on Machine Learning for CAD (MLCAD), ACM, 2024, 1-10 more… BibTeX Full text ( DOI )
- Hardware-efficient Duobinary Neural Network Equalizers for 800Gb/s IM/DD PAM4 Transmission over 10km SSMF. IEEE/OSA Journal of Lightwave Technology (JLT) 41 (12), 2023, 3783-3790 more… BibTeX Full text ( DOI )
- Machine Learning in Advanced IC Design: A Methodological Survey. IEEE Design & Test 40 (1), 2023, 17-33 more… BibTeX Full text ( DOI )
- Guest Editors’ Introduction: Special Issue on Machine Learning for CAD / EDA. IEEE Design and Test, 2023 more… BibTeX Full text ( DOI )
- Ferroelectric Ternary Content Addressable Memories for Energy Efficient Associative Search. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 42 (4), 2023, 1099-1112 more… BibTeX Full text ( DOI )
- BRoCoM: A Bayesian Framework for Robust Computing on Memristor Crossbar. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 42 (7), 2023, 2136-2148 more… BibTeX Full text ( DOI )
- Towards Neural Network Equalizer Implementations for IM/DD Transceivers. OptoElectronics and Communications Conference (OECC), 2023 more… BibTeX
- A Novel and Efficient Block-Based Programming for ReRAM-Based Neuromorphic Computing. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2023 more… BibTeX
- Implementation of a Robust and Power-Efficient Nonlinear 64-QAM Demapper using In-Memory Computing. Optical Fiber Communication Conference (OFC), 2023 more… BibTeX
- Countering Uncertainties in In-Memory-Computing Platforms with Statistical Training, Accuracy Compensation and Recursive Test. Design, Automation and Test in Europe (DATE), 2023 more… BibTeX
- NearUni: Near-Unitary Training for Efficient Optical Neural Networks. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2023 more… BibTeX
- Area-Efficient Neural Network CD Equalizer for 4x200Gb/s PAM4 CWDM4 Systems. Optical Fiber Communication Conference (OFC), 2023 more… BibTeX
- Area-Efficient Hardware Parallelization of Neural Network CD Equalizers for 4×200 Gb/s PAM4 CWDM4 Systems. European Conference on Optical Communication (ECOC), 2023 more… BibTeX
- CorrectNet: Robustness Enhancement of Analog In-Memory Computing for Neural Networks by Error Suppression and Compensation. Design, Automation and Test in Europe (DATE), 2023 more… BibTeXWWW
- SteppingNet: A Stepping Neural Network with Incremental Accuracy Enhancement. Design, Automation and Test in Europe (DATE), 2023 more… BibTeXWWW
- Class-based Quantization for Neural Networks. Design, Automation and Test in Europe (DATE), 2023 more… BibTeX Full text ( DOI ) WWW
- PowerPruning: Selecting Weights and Activations for Power-Efficient Neural Network Acceleration. ACM/IEEE Design Automation Conference (DAC), 2023 more… BibTeX Full text ( DOI ) WWW
- Flow-Based Microfluidic Biochips with Distributed Channel Storage: Synthesis, Physical Design, and Wash Optimization. IEEE Transactions on Computers (TC) 71 (2), 2022, 464 -- 478 more… BibTeX
- MiniControl 2.0: Co-Synthesis of Flow and Control Layers for Microfluidic Biochips With Strictly Constrained Control Ports. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022 more… BibTeX
- VirtualSync+: Timing Optimization with Virtual Synchronization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022 more… BibTeX
- Contamination-Aware Synthesis for Programmable Microfluidic Devices. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022 more… BibTeX
- Timing Camouflage Enabled State Machine Obfuscation. IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE), 2022 more… BibTeX
- 800Gb/s PAM4 Transmission Over 10km SSMF Enabled by Low-Complex Duobinary Neural Network Equalization. European Conference on Optical Communication (ECOC), 2022 more… BibTeX
- Energy Efficient Data Search Design and Optimization Based on A Compact Ferroelectric FET Content Addressable Memory. ACM/IEEE Design Automation Conference (DAC), 2022 more… BibTeX
- Power-Efficient and Robust Nonlinear Demapper for 64QAM Using in-Memory Computing. European Conference on Optical Communication (ECOC), 2022 more… BibTeX
- ASTERS: Adaptable Threshold Spike-timing Neuromorphic Design with Twin-Column ReRAM Synapses. ACM/IEEE Design Automation Conference (DAC), 2022 more… BibTeX
- Aging Aware Retraining for Memristor-based Neuromorphic Computing. The IEEE International Symposium on Circuits and Systems (ISCAS), 2022 more… BibTeX
- A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-widths. ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special Issue on Cross-Layer System Design and Regular Papers, 2021 more… BibTeX
- Flow-Based Microfluidic Biochips with Distributed Channel Storage: Synthesis, Physical Design, and Wash Optimization. IEEE Transactions on Computers (TC), 2021 more… BibTeX
- Computer-aided Design Techniques for Flow-based Microfluidic Lab-on-a-chip Systems. ACM Computing Surveys 54 (5), 2021 more… BibTeX
- PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021 more… BibTeX
- DCSA: Distributed Channel-Storage Architecture for Flow-Based Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40 (1), 2021, 115 -- 128 more… BibTeX
- RobustONoC: Fault-Tolerant Optical Networks-on-Chip with Path Backup and Signal Reflection. IEEE International Symposium on Quality Electronic Design (ISQED), 2021 more… BibTeX
- Bayesian Inference Based Robust Computing on Memristor Crossbar. ACM/IEEE Design Automation Conference (DAC), 2021 more… BibTeX
- Reliable Memristor-based Neuromorphic Design Using Variation- and Defect-Aware Training. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2021 more… BibTeX
- Aspect-Oriented Design Automation with Model Transformation. International Conference on VLSI and System-on-Chip (VLSI-SoC), 2021 more… BibTeX
- Interference-Free Design Methodology for Paper-Based Digital Microfluidic Biochips. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2021 more… BibTeX
- Energy-Aware Designs of Ferroelectric Ternary Content Addressable Memory. Design, Automation and Test in Europe (DATE), 2021 more… BibTeX
- Hardware-Software Codesign of Weight Reshaping and Systolic Array Multiplexing for Efficient CNNs. Design, Automation and Test in Europe (DATE), 2021 more… BibTeX
- An Efficient Programming Framework for Memristor-based Neuromorphic Computing. Design, Automation and Test in Europe (DATE), 2021 more… BibTeX
- Robustness of Neuromorphic Computing with RRAM-based Crossbars and Optical Neural Networks. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2021 more… BibTeX
- Integrated Control‐Fluidic CoDesign Methodology for Paper‐Based Digital Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (3), 2020 more… BibTeX Full text ( DOI )
- MultiControl: Advanced Control Logic Synthesis for Flow-Based Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (10), 2020 more… BibTeX Full text ( DOI )
- Test Generation for Flow-Based Microfluidic Biochips with General Architectures. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (10), 2020 more… BibTeX Full text ( DOI )
- TimingCamouflage+: Netlist Security Enhancement with Unconventional Timing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (12), 2020, 4482-4495 more… BibTeX Full text ( DOI )
- Transport-Free Module Binding for Sample Preparation using Microfluidic Fully Programmable Valve Arrays. Design, Automation and Test in Europe (DATE), 2020 more… BibTeX
- PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020 more… BibTeX
- Timing Resilience for Efficient and Secure Circuits. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2020 more… BibTeX
- A Pulse-width Modulation Neuron with Continuous Activation for Processing-In-Memory Engines. Design, Automation and Test in Europe (DATE), 2020 more… BibTeX
- Reliable and Robust RRAM-based Neuromorphic computing. ACM Great Lakes Symposium on VLSI (GLSVLSI), 2020 more… BibTeX
- Lifetime Enhancement for RRAM-Based Computing-In-Memory Engine Considering Aging and Thermal Effects. IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020 more… BibTeX
- Countering Variations and Thermal Effects for Accurate Optical Neural Networks. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020 more… BibTeX
- Statistical Training for Neuromorphic Computing using Memristor-based Crossbars Considering Process Variations and Noise. Design, Automation and Test in Europe (DATE), 2020 more… BibTeX
- EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration under Process Variations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019 more… BibTeX Full text ( DOI )
- MEMS-IC Robustness Optimization Considering Electrical and Mechanical Design and Process Parameters. ACM Transactions on Design Automation of Electronic Systems, 2019 more… BibTeX Full text ( DOI )
- MEMS-IC Yield Optimization with Electrical and Mechanical Process Parameters. CDNLive, 2019 more… BibTeX
- Fault Localization in Programmable Microfluidic Devices. Design, Automation and Test in Europe (DATE), 2019 more… BibTeX
- Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage. Design, Automation and Test in Europe (DATE), 2019 more… BibTeX
- MiniControl: Synthesis of Continuous-flow Microfluidics with Strictly Constrained Control Ports. ACM/IEEE Design Automation Conference (DAC), 2019 more… BibTeX
- Block-Flushing: A Block-based Washing Algorithm for Programmable Microfluidic Devices. Design, Automation and Test in Europe (DATE), 2019 more… BibTeX
- Performance Improvements for Block-Flushing. Workshop on Synthesis And System Integration of Mixed Information Technologies, 2019 more… BibTeX
- Aging-aware Lifetime Enhancement for Memristor-based Neuromorphic Computing. Design, Automation and Test in Europe (DATE), 2019 more… BibTeX
- Efficient spanning-tree-based test pattern generation for Programmable Microfluidic Devices. Microelectronics Journal, 2018 more… BibTeX Full text ( DOI )
- Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37 (2), 2018, 392--405 more… BibTeX Full text ( DOI )
- EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration under Process Variations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018 more… BibTeX Full text ( DOI )
- From Process Variations to Reliability: A Survey of Timing of Digital Circuits in the Nanometer Era. IPSJ Transactions on System LSI Design Methodology 11, 2018, 2-15 more… BibTeX Full text ( DOI )
- MEMS-IC Optimization Considering Design Parameters and Manufacturing Variation from both Mechanical and Electrical Side. IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2018 more… BibTeX
- PlanarONoC: Concurrent Placement and Routing Considering Crossing Minimization for Optical Networks-on-Chip. ACM/IEEE Design Automation Conference (DAC), 2018 more… BibTeX
- Timing with Virtual Signal Synchronization for Circuit Performance and Netlist Security. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2018 more… BibTeX
- Thermal-Aware Placement and Routing for 3D Optical Networks-on-Chips. IEEE International Symposium on Circuits and Systems (ISCAS), 2018 more… BibTeX
- Test Generation for Microfluidic Fully Programmable Valve Arrays (FPVAs) with Heuristic Acceleration. International Conference on IC Design and Technology (Invited Paper), 2018 more… BibTeX
- Design-for-Testability for Continuous-Flow Microfluidic Biochips. ACM/IEEE Design Automation Conference (DAC), 2018 more… BibTeX
- Automatic Design of Microfluidic Devices - An Overview of Platforms and Corresponding Design Tasks. Forum on Specification and Design Languages (FDL), 2018 more… BibTeX
- VirtualSync: Timing Optimization by Synchronizing Logic Waves with Sequential and Combinational Components as Delay Units. ACM/IEEE Design Automation Conference (DAC), 2018 more… BibTeX
- Multi-Channel and Fault-Tolerant Control Multiplexing for Flow-Based Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018 more… BibTeX
- TimingCamouflage: Improving Circuit Security against Counterfeiting by Unconventional Timing. Design, Automation and Test in Europe (DATE), 2018 more… BibTeX
- Columba 2.0: A Co-Layout Synthesis Tool for Continuous-Flow Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37 (8), 2018, 1588-1601 more… BibTeX Full text ( DOI ) Full text (mediaTUM)
- An Efficient Two-Phase ILP-Based Algorithm for Precise CMOS RFIC Layout Generation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 36 (8), 2017, 1313-1326 more… BibTeX Full text ( DOI ) Full text (mediaTUM)
- Component-Oriented High-Level Synthesis for Continuous-Flow Microfluidics Considering Hybrid-Scheduling. ACM/IEEE Design Automation Conference (DAC), 2017 more… BibTeX Full text (mediaTUM)
- Pressure-Aware Control Layer Optimization for Flow-Based Microfluidic Biochips. IEEE Transactions on Biomedical Circuits and Systems (TBioCAS) 11 (6), 2017, 1488-1499 more… BibTeX Full text ( DOI )
- Reliability-aware Synthesis and Fault Test of Fully Programmable Valve Arrays (FPVAs). IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, (Invited Paper), 2017(Invited Paper) more… BibTeX
- Testing Microfluidic Fully Programmable Valve Arrays (FPVAs) (pdf). Design, Automation and Test in Europe (DATE), 2017 more… BibTeX
- Transport or Store? Synthesizing Flow-based Microfluidic Biochips using Distributed Channel Storage. ACM/IEEE Design Automation Conference (DAC), 2017 more… BibTeX
- Hamming-Distance-Based Valve-Switching Optimization for Control Multiplexing in Flow-Based Microfluidic Biochip (pdf). IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2017 more… BibTeX
- Application of Machine Learning Methods in Post-Silicon Yield Improvement. IEEE International System on Chip Conference (SOCC), 2017 more… BibTeX
- Control-Fluidic CoDesign for Paper-Based Digital Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2016 more… BibTeX
- From Biochips to Quantum Circuits: Computer-Aided Design for Emerging Technologies. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2016 more… BibTeX
- Sampling-based Buffer Insertion for Post-Silicon Yield Improvement under Process Variability. Design, Automation and Test in Europe (DATE), 2016 more… BibTeX
- EffiTest: Efficient Delay Test and Statistical Prediction for Configuring Post-silicon Tunable Buffers (Best paper award nomination). ACM/IEEE Design Automation Conference (DAC), 2016 more… BibTeX
- PieceTimer: A Holistic Timing Analysis Framework Considering Setup/Hold Time Interdependency Using A Piecewise Model. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2016 more… BibTeX
- Effizienter Verzögerungstest zur Optimierung der Taktfrequenz einer Schaltung durch nach der Fertigung konfigurierbare Puffer. edaWorkshop, 2016 more… BibTeX
- Reliability, Adaptability and Flexibility in Timing: Buy a Life Insurance for Your Circuits. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2016 more… BibTeX
- Novel CMOS RFIC Layout Generation with Concurrent Device Placement and Fixed-Length Microstrip Routing. ACM/IEEE Design Automation Conference (DAC), 2016 more… BibTeX Full text (mediaTUM)
- Sieve-valve-aware Synthesis of Flow-based Microfluidic Biochips Considering Specific Biological Execution Limitations. Design, Automation and Test in Europe (DATE), 2016 more… BibTeX Full text (mediaTUM)
- Columba: Co-Layout Synthesis for Continuous-Flow Microfluidic Biochips. ACM/IEEE Design Automation Conference (DAC), 2016 more… BibTeX Full text (mediaTUM)
- Reliability-aware Synthesis with Dynamic Device Mapping and Fluid Routing for Flow-based Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 35 (12), 2016, 1981-1994 more… BibTeX Full text ( DOI ) Full text (mediaTUM)
- Timing Verification for Adaptive Integrated Circuits. Design, Automation and Test in Europe (DATE), 2015 more… BibTeX
- Evaluation of circuit performance and configuration reduction considering post-silicon clock skew tuning. edaWorkshop, 2015 more… BibTeX
- Statistical Timing Analysis and Criticality Computation for Circuits With Post-Silicon Clock Tuning Elements. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015 more… BibTeX Full text ( DOI )
- Design Automation for Microfluidic Biochips Considering Efficiency and Reliability. MikroSystemTechnik Kongress, 2015 more… BibTeX
- ILP-based Alleviation of Dense Meander Segments with Prioritized Shifting and Progressive Fixing in PCB Routing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015 more… BibTeX Full text ( DOI ) Full text (mediaTUM)
- Reliability-aware Synthesis for Flow-based Microfluidic Biochips by Dynamic-device Mapping. ACM/IEEE Design Automation Conference (DAC), 2015 more… BibTeX Full text (mediaTUM)
- Storage and Caching: Synthesis of Flow-based Microfluidic Biochips. IEEE Design and Test, 2015 more… BibTeX Full text ( DOI ) Full text (mediaTUM)
- Iterative Refinement of Dense Meander Segments in High-speed Printed Circuit Boards. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, 2013 more… BibTeX
- On Timing Model Extraction and Hierarchical Statistical Timing Analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 32 (3), 2013, 367-380 more… BibTeX
- Post-Route Refinement for High-Frequency PCBs Considering Meander Segment Alleviation. ACM Great Lake Symposium on VLSI (GLSVLSI), 2013 more… BibTeX Full text (mediaTUM)
- Post-Route Alleviation of Dense Meander Segments in High-Performance Printed Circuit Boards. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2013 more… BibTeX Full text (mediaTUM)
- Iterative Timing Analysis Based on Nonlinear and Interdependent Flipflop Modelling. IET Circuits, Devices & Systems, 2012 more… BibTeX
- Variation-Aware Leakage Power Model Extraction for System-Level Hierarchical Power Analysis. Design, Automation and Test in Europe (DATE), 2012 more… BibTeX
- Mathematical Modeling of Process Variations – 3.3. In: Process Variations and Probabilistic Integrated Circuit Design. Springer, 2012, 81-88 more… BibTeX
- Statistical Static Timing Analysis – 4.3. In: Process Variations and Probabilistic Integrated Circuit Design. Springer, 2012, 117-126 more… BibTeX
- Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 31 (11), 2012, 1670-1683 more… BibTeX
- Fast Statistical Timing Analysis for Circuits with Post-Silicon Tunable Clock Buffers. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2011 more… BibTeX
- Timing Modeling of Flipflops Considering Aging Effects. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (Lecture Notes in Computer Science), 2011 more… BibTeX
- Iterative Timing Analysis Considering Interdependency of Setup and Hold Times. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (Lecture Notes in Computer Science), 2011 more… BibTeX
- Fast Statistical Timing Analysis of Latch-Controlled Circuits for Arbitrary Clock Periods. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2010, 524-531 more… BibTeX
- Sensitivity Based Parameter Reduction for Statistical Analysis of Circuit Performance. IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2009 more… BibTeX
- On Hierarchical Statistical Static Timing Analysis. Design, Automation and Test in Europe (DATE), 2009 more… BibTeX
- Timing Model Extraction for Sequential Circuits Considering Process Variations. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2009, 336-343 more… BibTeX
- Static Timing Model Extraction for Combinational Circuits. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Springer, 2008 more… BibTeXWWW
- A New Bounding Technique for Handling Arbitrary Correlations in Path-Based SSTA. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Springer, 2008 more… BibTeXWWW
- Transfer System Models of Logic Gates for Waveform-based Timing Analysis. Proceedings SM^2ACD'08, 2008, 247-252 more… BibTeX Full text (mediaTUM) WWW
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PD Dr.-Ing. habil. Bing Li
Technical University of Munich
Chair of Electronic Design Automation (Prof. Schlichtmann)
Postal address
Postal:
Arcisstr. 21
80333 München
- Phone: (work pref) +49 (89) 289 - 23646
- Room: 0509.03.920
- b.li@tum.de