Design of Electronic Circuits and Systems (DECS)

Semiconductor devices have been the driving force behind major technological achievements for more than 40 years and are the key technology for developing new systems to solve today's most important human problems, particularly in the fields of energy distribution and supply, electromobility, security, healthcare and communications. The integration of an increasing number of functions on a chip with the aim of reducing power consumption and cost while increasing speed has been a strong and continuing trend for many years. In order to be at the forefront of technological development not only now, but also in the future, and to increase market share in highly competitive global markets, it is essential to maintain and develop competencies and skills in the design of integrated circuits and systems. The DECS (Design of Electronic Circuits and Systems) competence center conducts research and teaching on the design of and design methods for integrated circuits at all levels of abstraction.

Contact: coc-decs@eisec.cit.tum.de

Mission and Goals

DECS provides the necessary competencies, methodologies, and design environments for education and research in new semiconductor-based solutions.

DECS develops and provides comprehensive skills, design environments, and solution approaches to build integrated circuits and systems for areas like communication, sensing, medical electronics, robotics, embedded systems and neuro-engineering.

Core Competences

Core Design:
- RISC-V Cores with Security Extensions
- Embedded Machine Learning based on RISC-V
Multi-Core SoCs:
- Networks-on-chips (NoCs)
- Memory-Architectures
Electronic System Level Design Methods
- HW/SW Codesign
- Virtual Prototyping & TinyML
- Instruction Set Simulation
HW Accelerators
- Accelerators for MPSoCs
- Accelerators for Security Primitives
- Post-Quantum Security Acceleration
Brain-inspired Computing for Efficient
- Brain-Inspired Hyperdimensional Computing
- Technology/Algorithm Co-Design.
- Error-Aware Training for DNN
- Neuromorphic Computing

RISC-V Chip with Post-Quantum-Cryptography

Chip and Circuit Design
- Security coprocessors and primitives
- Circuits exploiting hardware-intrinsic features (True Random Number Generators, Physical Unclonable Functions)
- RISC-V Instruction-Set-Extensions
- Integrated Mixed Signal Systems for Sensors and Communication Interfaces
- Analog-to-Digital Converter
- New Hardware Approaches for AI, e.g. Machine Learning for IoT (TinyML)
- Compute-in-Memory Circuits
Design Methodology
- Chip Reverse Engineering
- Hardware Trojan Detection
- Circuit Obfuscation (e.g., Timing Camouflage)

Chip and Circuit Design:
- Analog Front-End Amplifier
- Integrated Sensors (Strain, Impedance, Hall)
- Mixed-mode Edge-AI with NVM Synaptic Memory
- Flexible Clock Generation (Phased-Locked-Loops)
- Analoge and Digitale Low-Power-CMOS-Schaltungen
- Novel Logic-in-Memory Cells
- Emerging Technologies and Beyond CMOS
- Reliability/Thermal-Aware Circuit Design
Design Methodology
- Full-Custom Design Flow (Cadence) from Schematic to Layout and Back-Annotation
- Experimental Characterization of Analog Performance on Chip/Wafer and in Application Context (Demo-Boards)
- Yield Optimization of Circuits
- Design Automation for Analog Circuits
- (Virtual) Prototyping of Sensor and Actor Systeme
- Technology CAD (TCAD) Modeling
- Reliability Enhancement Techniques