Foto von Jens Nöpel

M.Sc. Jens Nöpel

Dienstort

Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)

Work:
Theresienstr. 90(0101)/1.ZG
80333 München

Research Interests

  • Memory Encryption and Integrity
  • Symmetric Ciphers
  • Digital Hardware Design

Student Research Positions

The table below presents available research opportunities for prospective Bachelor's or Master's theses, as well as opportunities for research internships. If you possess a keen interest in collaborating within my designated research areas and do not find your specific research focus listed at this time, I invite you to engage in a personal dialogue with me. During this discussion, we can explore and deliberate upon potential research topics that align with your academic pursuits.

Open Positions for Students

Bachelorarbeiten

Digital Hardware Design and Evaluation

Beschreibung

I am looking for students who are interested in HW implementations and have knowledge of a HDL language. If you are also interested in cryptography and its applications, you would be a suitable candidate.

Possible implementation tasks are the
  - Extension / implementation of symmetric ciphers
  - Extension / implementation of message authentication codes
  - Extension / implementation of error correction codes / functionality

The implementation will be analysed for its suitability for memory encryption and integrity verification of memory contents. For this assessment, typical performance metrics will be measured and evaluated on an FPGA.

If any of the topics interest you, please email me to discuss the details and your personal interests.

Betreuer:

Jens Nöpel

Masterarbeiten

HW Implementation of Committing Authenticated Encryption based on SHAKE

Beschreibung

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Betreuer:

Jens Nöpel

Digital Hardware Design and Evaluation

Beschreibung

I am looking for students who are interested in HW implementations and have knowledge of a HDL language. If you are also interested in cryptography and its applications, you would be a suitable candidate.

Possible implementation tasks are the
  - Extension / implementation of symmetric ciphers
  - Extension / implementation of message authentication codes
  - Extension / implementation of error correction codes / functionality

The implementation will be analysed for its suitability for memory encryption and integrity verification of memory contents. For this assessment, typical performance metrics will be measured and evaluated on an FPGA.

If any of the topics interest you, please email me to discuss the details and your personal interests.

Betreuer:

Jens Nöpel

Forschungspraxis (Research Internships)

Digital Hardware Design and Evaluation

Beschreibung

I am looking for students who are interested in HW implementations and have knowledge of a HDL language. If you are also interested in cryptography and its applications, you would be a suitable candidate.

Possible implementation tasks are the
  - Extension / implementation of symmetric ciphers
  - Extension / implementation of message authentication codes
  - Extension / implementation of error correction codes / functionality

The implementation will be analysed for its suitability for memory encryption and integrity verification of memory contents. For this assessment, typical performance metrics will be measured and evaluated on an FPGA.

If any of the topics interest you, please email me to discuss the details and your personal interests.

Betreuer:

Jens Nöpel

Studentische Hilfskräfte

Digital Hardware Design and Evaluation

Beschreibung

I am looking for students who are interested in HW implementations and have knowledge of a HDL language. If you are also interested in cryptography and its applications, you would be a suitable candidate.

Possible implementation tasks are the
  - Extension / implementation of symmetric ciphers
  - Extension / implementation of message authentication codes
  - Extension / implementation of error correction codes / functionality

The implementation will be analysed for its suitability for memory encryption and integrity verification of memory contents. For this assessment, typical performance metrics will be measured and evaluated on an FPGA.

If any of the topics interest you, please email me to discuss the details and your personal interests.

Betreuer:

Jens Nöpel