Bachelorarbeiten
Digital Hardware Design and Evaluation
Beschreibung
I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.
Possible implementation tasks are the
- Extension/implementation of symmetric ciphers
- Extension/implementation of message authentication codes
- Extension/implementation of error correction codes/functionality
The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.
If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.
Betreuer:
Masterarbeiten
Empowering Secure Automotive Computing with Standard Memory Devices
External Master Thesis at Infineon
Beschreibung
Challenge As the automotive industry continues to evolve, the need for secure data storage in vehicles is becoming increasingly important. Infineon is committed to making life safer and more secure on the road. To achieve this, we're seeking a talented individual to explore the integration of standard memory devices into our safe and secure automotive computation platform.
Objective This thesis aims to design an innovative solution for an external memory accelerator, utilizing LPDDR or SemperX interfaces, to ensure reliable and secure data storage in vehicles. This project builds upon research conducted by TUM-LIS and TUM-SEC for the CeCaS project.
Key Tasks
- Investigate state-of-the-art publications and solutions to identify promising micro-architectures for secure data storage.
- Define security functionality that leverages standard external memories without requiring protocol changes to external devices.
- Develop a system simulation using Platform Architect or Enterprise Architect to model memory accelerator performance, building upon the existing testbench from Dominik Langen.
- Optimize the accelerator's functionality for the AURIX-RC1 architecture, incorporating a defined NoC interface and LPDDR/SemperX controller interface.
- Refine the model to a synthesizable level, enabling area and power feasibility studies.
Potential attack scenarios
- RowHammer attack: In a talk from ISCA 2020, it seems RowHammer is still possible. Encryption, in theory, should prevent controlled attacks, but content can be changed randomly.
- ColdBoot attack: In short, a cooled DRAM holds its content and can be read later to get access to the content. Encryption at least prevents getting knowledge from the DRAM content.
- Attack on the LPDDR bus: Encryption prevents systematic alternation of DRAM content.
- RAMBleed: A way to read out memory content even if an MMU protects the memory area. With encryption, the content can be hidden, but stored keys can still be read.
- Opening the DRAM package and getting access to its internal cell array: This attack is very unlikely but possible for very few institutional attackers or big criminal organizations. Again, encryption helps.
- What else?
By tackling this challenge, you'll be contributing to the development of a safer and more secure automotive computing platform, ultimately making a positive impact on people's lives.
Infineon contact
Rainer Menes
TUM-SEC contact
Jens Nöpel
Apply here (please attach your current grade report and a CV)
Betreuer:
Digital Hardware Design and Evaluation
Beschreibung
I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.
Possible implementation tasks are the
- Extension/implementation of symmetric ciphers
- Extension/implementation of message authentication codes
- Extension/implementation of error correction codes/functionality
The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.
If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.
Betreuer:
Forschungspraxis (Research Internships)
Digital Hardware Design and Evaluation
Beschreibung
I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.
Possible implementation tasks are the
- Extension/implementation of symmetric ciphers
- Extension/implementation of message authentication codes
- Extension/implementation of error correction codes/functionality
The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.
If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.
Betreuer:
Studentische Hilfskräfte
Digital Hardware Design and Evaluation
Beschreibung
I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.
Possible implementation tasks are the
- Extension/implementation of symmetric ciphers
- Extension/implementation of message authentication codes
- Extension/implementation of error correction codes/functionality
The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.
If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.