ab 22.03.2023 findet das PhD Seminar ab 17:30 Uhr in der Theresesienstr. 90 im ZG im Hörsaal N1095ZG statt.
Termine im Einzelnen
Um Einladungen zu allen öffentlichen Vorträgen des PhD-Seminars zu erhalten können Sie sich hier anmelden/abmelden
PhD Seminar 2024
| 30.10. | Public: On the Importance of Physical Mode Parameter for PUF Performance: A case study of BFO Memristors | Jonas Ruchti, TUM | |
| 28.08. | Public: 1. Switch-Glitch - Location of Fault Injection Sweet Spots by Electromagnetic Emanation 2. Unlock the Door to my Secrets, but don’t Forget to Glitch | 1. Matthias Probst, TUM 2. Marc Schink, Fraunhofer AISEC
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| 19.06. | Public: 1. On the security and performance assessment in the design of quantum key distribution networks 2. RISC-V and Trusted Electronics: a match made in heaven? | 1. Peter Horoschenkoff, Rohde & Schwarz 2. Johanna Baehr, Fraunhofer AISEC | |
| 22.05. | Public: A New Generation Automotive Tool Access Architecture for Remote in-Field Diagnosis | Gasper Skvarc Bozic, Infineon Technologies | |
| 15.05. | Public: 1. MultiTEE - Distributing Trusted Execution Environments 2. DMTI: Accelerating Memory Error Detection in Precompiled C/C++ Binaries with ARM Memory Tagging Extension | 1. Simon Ott, Fraunhofer AISEC, 2. Konrad Hohentanner, Fraunhofer AISEC
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| 17.04. | Public: DOMREP II | Matthias Probst, TUM | |
| 27.03.2024 | Public: 1. Leakage Sources of the ICLooPUF: Analysis of a Side-Channel Protected Oscillator-Based PUF 2. Sensors for Data Bus Protection | 1. Niklas Stein, TUM, 2. Hamidreza Moghadas, Infineon | |
| 06.03. | Public: 1. Impeccable Keccak - Towards Fault Resilient SPHINCS+ Implementations 2. Trojan Assets and Attack Vectors in Processors | 1. Ivan Gavrilan, Fraunhofer AISEC 2. Czea Sie Chuah, DENSO Automotive Deutschland | |
| 31.01. | Public: 1. The Post-Quantum Signature Scheme CROSS - An Introduction to Engineers 2. The Impact of Hash Primitives and Communication Overhead for Hardware-Accelerated SPHINCS+ | 1. Patrick Karl, TUM 2. Jonas Schupp, TUM | |
PhD Seminar 2023
| 22.11. | Public: A Masked Hardware Accelerator for Feed-Forward Neural Networks with Fixed-Point Arithmetic | Matthias Probst, TUM | |
| 04.10. | Public: 1. RISC-V Instruction Set Extensions for Cryptography - From Research to Standardization 2. Enabling Lattice-Based Post-Quantum Cryptography on the OpenTitan Platform | 1. Felix Oberhansl, Fraunhofer AISEC 2. Tobias Stelzer, Fraunhofer AISEC | |
| 09.08. | Public: 1. Universal Remote Attestation for Cloud and Edge Platforms 2. Formal Verification of Security Properties on RISC-V Processors | 1. Simon Ott, Fraunhofer AISEC 2. Czea Sie Chuah, DENSO Automotive Deutschland | |
| 21.06. | Public: Faulting Winternitz One-Time Signatures to forge LMS, XMSS, or SPHINCS+ signatures | Alexander Wagner, Fraunhofer AISEC | |
| 14.06. | Public: 1. HWASanIO: Detecting C/C++ Intra-object Overflows with Memory Shading 2.Hide and Seek: Using Occlusion Techniques for Side-Channel Leakage Attribution in CNNs | 1. Konrad Hohentanner, Fraunhofer AISEC 2. Thomas Schamberger, TUM | |
| 29.03. | Beginn 17:30 Uhr Public: 1. (Un)Attractiveness for State Machine Obfuscation 2. Whiteboxgrind - Automated Analysis of Whitebox Cryptography | 1. Michaela Brunner, TUM 2. Michael Gruber, TUM | |
| 22.03. | Beginn 17:30 Uhr - Public: CryptSan: Leveraging ARM Pointer Authentication for Memory Safety in C/C++ | Konrad Hohentanner, Fraunhofer AISEC | |
| 15.02. | Public: Adapting Belief Propagation to Counter Shuffling of NTTs | Emanuele Strieder, Silvan Streit, Fraunhofer AISEC | |
| 11.01. | Public: CompaSeC: A Compiler-assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V | Johannes Geier, TUM EDA |
PhD Seminar 2022
| 16.11. | Public: FPGANeedle: Precise Remote Fault Attacks from FPGA to CPU | Mathieu Gross, TUM |
| 19.10. | Public: 1. To Be, or Not to Be Stateful: Post-Quantum Secure Boot using Hash-Based Signatures 2. On-Chip Side-Channel Analysis of the Loop PUF | 1. Alexander Wagner, Fraunhofer AISEC 2. Lars Tebelmann, TUM |
| 12.10. | Public: Techniques to Secure HW/SW-Programmable SoC Architectures for Edge Computing | Franz-Josef Streit, Friedrich-Alexander-Universität Erlangen-Nürnberg |
| 21.09. | Public: 1. Timing Camouflage Enabled State Machine Obfuscation 2. Analysis of Graph-based Partitioning Algorithms and Partitioning Metrics for Hardware Reverse Engineering | 1. Michaela Brunner, TUM 2. Johanna Baehr, TUM |
| 07.09. | Public: 1. The Wiretap Channel for Capacitive PUF-Based Security Enclosures 2. A Pragmatic Methodology for Blind Hardware Trojan Insertion in Finalized Layouts 3. When the Decoder Has to Look Twice: Glitching a PUF Error Correction | 1. Kathrin Garb, Fraunhofer AISEC 2. Alexander Hepp, TUM 3. Jonas Ruchti, TUM |
| 17.08. | Public: Open Source Hardware Design and Hardware Reverse Engineering: A Security Analysis | Johanna Baehr, TUM |
| 01.06. | Public: Leaking AI: A Look into Physical Attacks on EdgeML Devices | Shivam Bhasin, NTU Singapur |
| 25.05. | Public: A Power Side-Channel Attack on the Reed-Muller Reed-Solomon Version of the HQC Cryptosystem | Thomas Schamberger, TUM |
| 11.05. | Intern: Paper Review | TUM und AISEC-Mitarbeiter |
| 27.04. | Public: Framework for Integrated Circuit Layout Verification via Hardware Reverse Engineering | Matthias Ludwig, Infineon |
| 06.04. | Intern: A Second Look at the ASCAD Databases | Thomas Schamberger, TUM |
| 30.03. | Public: Hardware Obfuscation of Digital FIR Filters | Levent Aksoy, TalTech Tallinn |
| 16.02. | Public: A TOCTOU Attack on DICE Attestation | Stefan Hristozov, Fraunhofer AISEC |
| 19.01. | Public: 1 Golden Model-Free Hardware Trojan Detection by Classification of Netlist Module Graphs 2. Physical and Functional Reverse Engineering Challenges for Advanced Semiconductor Solutions | 1. Alexander Hepp, TUM 2. Bernhard Lippmann, Infineon |
| 12.01. | Public: 1. Counteract Side-Channel Analysis of Neural Networks by Shuffling 2. Beware of the Bias -- Statistical Performance Evaluation of Higher-Order Alphabet PUFs | 1. Manuel Brosch, TUM 2. Christoph Frisch, TUM |
PhD Seminar 2021
| 15.12. | Public: An Overview about Hardware/Software Codesign Strategies and Instruction Set Extensions for Post-Quantum Cryptography | Tim Fritzmann, TUM |
| 24.11. | Public: 1. Analysis and Protection of the Two-Metric Helper Data Scheme 2. Towards a Human-readable State Machine Extraction 3. Lightning Talk: RISCV-HT | 1. Lars Tebelmann,TUM 2. Michaela Brunner, TUM 3. Alexander Hepp, TUM |
| 03.11. | Public: 1. Attacks and Countermeasures for Capacitive PUF-Based Enclosures 2. CRESS: Framework for Vulnerability Assessment of Attack Scenarios in Hardware Reverse Engineering | 1.Kathrin Garb, Fraunhofer AISEC 2. Matthias Ludwig, Infineon + Alexander Hepp, TUM |
| 29.09. | Intern: Gastvortrag der Universität Tallin | Tara Ghasempouri, Tallinna Tehnikaülikool (TalTech) |
| 15.09. | Public: 1. ARCHIE: A QEMU-Based Framework for Architecture-Independent Evaluation of Faults 2. Algebraic Fault Analysis of Subterranean 2.0 | 1. Kathrin Garb, Fraunhofer AISEC 2. Michael Gruber, TUM |
| Sommerpause bis Mitte September | ||
| 04.08. | Public: Security and Trust in Open Source Security Tokens | Marc Schink, Fraunhofer AISEC |
| 14.07. | Public: CardioTEXTIL: Wearable for Monitoring and End-to-End Secure Distribution of ECGs | Martin Striegel, Fraunhofer AISEC |
| 23.06. | Intern: DOMREP - An Orthogonal Countermeasure for Arbitrary Order Side-Channel and Fault Attack Protection | Michael Gruber, TUM |
| 09.06. | Public Machine Learning of Physical Unclonable Functions using Helper Data | Emanuele Strieder, Fraunhofer AISEC |
| 05.05. | Public: Tapeout of a RISC-V Crypto Chip with Hardware Trojans | Alexander Hepp, TUM |
| 24.03. | Intern: Enhancing the security of FPGA-SoCs via the usage of ARM TrustZone and a Hybrid-TPM | Mathieu Gross, TUM |
| 03.03. | Public: The Cost of OSCORE and EDHOC for Constrained Devices | Stefan Hristozov, Fraunhofer AISEC |
| 10.02. | Intern: High-level Intellectual Property Obfuscation via Decoy Constants | Levent Aksoy, TalTech University |
| 13.01. | Public:Open Source IC Design and Hardware Reverse Engineering or: How I learned to stop worrying and love reverse engineering RISC-V designs. | Johanna Baehr, TUM |
| 05.01. | Intern: Introduction to the Security of Neural Networks against Hardware Attacks | Manuel Brosch + Matthias Probst, TUM |
PhD Seminar 2020
| 18.11. | Inter: Hardening Digital Circuits against Invasive Attacks with On-Chip Delay Measurements | Michael Weiner |
| 04.11. | Public: A Power Side-Channel Attack on the CCA2-Secure HQC KEM | Thomas Schamberger, TUM |
| 28.10. | Public: 1. Statistical Ineffective Fault Analysis of GIMLI 2. Protecting RESTful IoT Devices from Battery Exhaustion DoS Attacks | 1. Michael Gruber, TUM 2. Stefan Hristozov, AISEC |
| 30.09. | Public: 1. Self-Secured PUF: Protecting the Loop PUF by Masking 2. Efficient Hardware/Software Co-Design for Post-Quantum Crypto Algorithm SIKE on ARM and RISC-V based Microcontrollers | 1. Lars Tebelmann, TUM 2. Debapriya Basu Roy, TUM |
| 23.09. | Public: 1. MP3 Compression To Diminish Adversarial Noise in End-to-End Speech Recognition Iustina Andronic 2. Audio Adversarial Examples for Robust Hybrid CTC/Attention Speech Recognition | Ludwig Kürzinger, TUM |
| 19.08. | Intern: The Lazarus Effect: Healing Compromised Devices in the Internet of Small Things | Stefan Hristozov, Fraunhofer AISEC |
| 12.08. | Intern: 1. RISQ-V: Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography 2. Strengthening Post-Quantum Security for Automotive Systems 3. The Influence of LWE/RLWE Parameters on theStochastic Dependence of Decryption Failures | 1. + 2. Tim Fritzmann, TUM 3. Georg Maringer, TUM |
| 05.08. | Intern: A benchmarking framework for evaluating the SW performance of NIST Lightweight Cryptography (LWC) candidates | Sebastian Renner, OTH Regensburg |
| 22.07. | Intern: Temporary Laser Fault Injection into Flash Memory: Calibration, Enhanced Attacks, and Countermeasures | Kathrin Garb, Fraunhofer AISEC |
| 01.07. | Intern: Secure and User-Friendly Over-the-Air Firmware Distribution in a Portable Faraday Cage | Martin Striegel, Fraunhofer AISEC |
| 17.06. | Intern: ROPAD: A Fully Digital Highly Predictive Ring Oscillator Probing Attempt Detector | Hamidreza Moghadas, Infineon |
| 19.02. | Public:Extending the RISC-V Instruction Set for Hardware Acceleration of the Post-Quantum Scheme LAC | Tim Fritzmann, TUM |
| 22.01. | kein PhD Seminar | |
| 15.01. | TUM intern: Efficient Signature Verification and Key Revocation using Identity Based Cryptography | Tobias Guggemos, LMU |
PhD Seminar 2019
| 04.12. | Public: 1. Efficient Bound for Conditional Min-Entropy of Physical Unclonable Functions Beyond IID 2. Understanding millions of gates: Introduction to IC reverse engineering for non-chip-reverse-engineers | 1. Florian Wilde, TUM 2. Johanna Baehr, TUM |
| 27.11. | TUM intern: Higher-Order Alphabet Physical Unclonable Functions | Vincent Immler, Fraunhofer AISEC |
| 13.11. | TUM intern: Breaking and Restoring Embedded System Security | Johannes Obermaier, Fraunhofer AISEC |
| 06.11. | Public: 1. Post-Quantum Key Exchange for Safety Critical Systems 2. SCA Secure and Updatable Crypto Engines for FPGA SoC Bitstream Decryption | 1. Tim Fritzmann, TUM 2. Nisha Jacob, Fraunhofer AISEC |
| 23.10. | Public: 1.Breaking TrustZone Memory Isolation through Malicious Hardware on a Modern FPGA-SoC 2. Peak Clock: Fault Injection into PLL-Based Systems via Clock Manipulation | 1. Mathieu Gross, TUM 2. Bodo Selmke, Fraunhofer AISEC |
| 25.09. | Public: System Architectures for Data Confidentiality and Frameworks for Main Memory Extraction | Manuel Huber, Fraunhofer AISEC |
| 17.07. | Public: Taking a Look into Execute-Only Memory | Marc Schink + Johannes Obermaier, Fraunhofer AISEC |
| 03.07.18:00 | Public: Undermining User Privacy on Mobile Devices Using AI | Andreas Zankl, Fraunhofer AISEC |
| 03.07.15:30 neue Uhrzeit | TUM Intern: Channel Coding for Hardware Intrinsic Security | Sven Müelich, Uni Ulm |
| 26.06. | TUM Intern: PhD-Seminar zum Thema NIST LWC | Michael Tempelmeier, TUM und Sebastian Renner, OTH Regensburg |
| 12.06. 13:00 | TUM Intern: On the Confidence in Bit-Alias Measurement of Physical Unclonable Functions | Florian Wilde, TUM |
| 29.05. | Public: Curve Based Cryptography: High-Performance Implementations and Speed Enhancing Methods | Philipp Koppermann |
| 15.05. | Public: High Resolution EM Side Channel Attacks with Multiple Measurement Probes | Robert Specht |
| 10.04. | Public: 1. Improving on State Register Identification in Sequential Hardware Reverse Engineering 2. Using Hardware Software Codesign for Optimised Implementations of High-Speed and Defence in Depth CAESAR Finalists | 1. Michaela Brunner, TUM 2. Michael Tempelmeier, TUM |
| 02.04. | TUM intern: Secure and Efficient Lightweight Authenticated Encryption for the Internet of Things | Dr. William Diehl, Virginia Polytechnic Institute and State University (Virginia Tech) |
| 20.03. | Public:1. Practical Evaluation of Masking for NTRUEncrypt on ARM Cortex-M4 2. Differential Fault Attacks on KLEIN | 1. Thomas Schamberger, TUM 2. Michael Gruber, TUM |
| 06.03. | Public:1. Efficient and Flexible Low-Power NTT for Lattice-Based Cryptography 2. Side-Channel Analysis of the TERO PUF | 1. Tim Fritzmann, TUM 2. Lars Tebelmann |
| 13.02. | Public: A Calibratable Detector for Invasive Attacks | Michael Weiner, BMW |
| 30.01. | Public: EyeSec: A Retrofittable Augmented Reality Tool for Troubleshooting Wireless Sensor Networks in the Field | Martin Striegel, Fraunhofer AISEC |
| 16.01. | Public: 1.Machine Learning and Structural Characteristics for Reverse Engineering 2. Integrated Flow for Reverse Engineering of Nanoscale Technologies | 1. Johanna Baehr, TUM 2. Bernhard Lippmann, Infineon |
PhD Seminar 2018
| 19.12. | TUM Intern: Vorstellung Reviews Host Paper | PhD Candidates TUM + Fraunhofer AISEC |
| 12.12. | TUM Intern: Software-induced Hardware Attacks - Research Directions and Discussion | PhD Candidates TUM + Fraunhofer AISEC |
| 14.11. | Public: Experimental Power and Performance Evaluation of CAESAR Hardware Finalists | Michael Tempelmeier, TUM |
| 31.10. | TUM Intern: Software-induced Hardware Attacks - Research Directions and Discussion | PhD Candidates TUM + Fraunhofer AISEC |
| 04.10. 13:00 | Public: Secure and Compact Full NTRU Hardware Implementation | Tim Fritzmann, TUM |
| 19.09. | Public: 1. CoRT: A Communication Robustness Testbed for Industrial Control System Components 2. You Snooze, You Lose: Measuring PLC Cycle Times under Attacks 3. Efficient Passive ICS Device Discovery and Identification by MAC Address Correlation | Matthias Niedermaier, Hochschule Augsburg |
| 22.08. | Public: Fast FPGA Implementations of Diffie-Hellman on the Kummer Surface of a Genus-2 Curve | Philipp Koppermann, Fraunhofer AISEC |
| 25.07. | Public: 1. Analysis of Error-Correcting Codes for Lattice-Based Key Exchange 2. DATA – Differential Address Trace Analysis: Finding Address-based Side-Channels in Binaries | 1. Tim Fritzmann, TUM + 2. Andreas Zankl, Fraunhofer AISEC |
| 01.08.-31.08. | no seminar scheduled | |
| 10.07. | TUM Intern: Evaluation of DPA Protected Implementations of CAESAR Finalists ACORN and Ascon and other Candidates | PhD Candidates TUM + Fraunhofer AISEC |
| 04.07. | TUM Intern: Side-Channel Analysis | PhD Candidates TUM + Fraunhofer AISEC |
| 20.06. | TUM Intern: | PhD Candidates TUM + Fraunhofer AISEC |
| 13.06. | TUM Intern: An overview of RISC-V | Mathieu Gross, TUM + Lucas Auer, Fraunhofer AISEC: PhD Candidates TUM + Fraunhofer AISEC |
| 09.05. 18:00 | Public: 1. A Measurement System for Capacitive PUF-Based Security Enclosures 2. An Embedded Key Management System for PUF-based Security Enclosures | Johannes Obermaier, Fraunhofer AISEC |
| 25.04. 18:00 | TUM Intern: Multiple instruction-skips leveraging electromagnetic fault injection | Alexandre Menu, École nationale supérieure des mines de Saint-Étienne (EMSE) |
| 18.04. | Public: 1. Dividing the Threshold: Multi-Probe Localized EM Analysis on Threshold Implementations 2. Large Scale RO PUF Analysis over Slice Type, Evaluation Time and Temperature on 28nm Xilinx FPGAs | 1. Robert Specht + 2. Robert Hesselbarth, Fraunhofer AISEC |
| 11.04. | TUM Intern: High-Level Side-Channel Leakage Models with Application to Compilers | Hermann Seuschek, Siemens |
| 28.03. | Public: High-Resolution EM Attacks Against Leakage-Resilient PRFs Explained | Florian Unterstein, Fraunhofer AISEC |
| 21.03. | TUM Intern: 1. B-TREPID: Batteryless Tamper-Resistant Envelope with a PUF and Integrity Detection 2. The CAESAR-API in the Real World - Towards a Fair Evaluation of Hardware CAESAR Candidates | 1. Vincent Immler, Fraunhofer AISEC + 2. Michael Tempelmeier, TUM |
| 14.03. | Public: Earthquake - A NoC-based optimized differential collision cache attack for MPSoCs | Cezar Reinbrecht, Federal University Rio Grande do Sul |
| 07.03. | TUM Intern: | Michael Tempelmeier, TUM |
| 14.02. | Public: Practical Runtime Attestation for Tiny IoT Devices | Stefan Hristozov, Fraunhofer AISEC |
| 31.01. | TUM Intern: Algorithmic and Protocol Level Countermeasures to Protect Cryptographic Devices | Fabrizio De Santis, Siemens |
| 17.01. | TUM Intern: | PhD Candidates TUM + Fraunhofer AISEC |
PhD Seminar 2017
| 06.12. | TUM Intern: | PhD Candidates TUM + Fraunhofer AISEC |
| 29.11. | CANCELLED Public: Variable-Length Bit Mapping and Error-Correcting Codes for Higher-Order Alphabet PUFs | Vincent Immler/Matthias Hiller, Fraunhofer AISEC |
| 15.11. | 17:30 TUM Intern | PhD Candidates TUM + Fraunhofer AISEC |
| 25.10. | Public: EM-Side-Channel Attack on BCH-based Error Correction for PUF-based Key Generation | Lars Tebelmann, TUM |
| 13.09. | Public: Your Rails Cannot Hide From Localized EM: How Dual-Rail Logic Fails on FPGAs | Robert Specht, Fraunhofer AISEC |
| 06.09. | Public: 1. How to Break Secure Boot on FPGA SoCs through Malicious Hardware 2. Hiding Secrecy Leakage in Leaky Helper Data | 1. Nisha Jacob, Fraunhofer AISEC 2. Matthias Hiller, Fraunhofer AISEC |
| 30.08. | Public: Towards a Unified Security Model for Physically Unclonable Functions | Prof. Frederik Armknecht |
| 10.08.-29.08. | no seminar scheduled | |
| 09.08. | Public: AutoLock: Why Cache Attacks on ARM Are Harder Than You Think | Andreas Zankl, Fraunhofer AISEC |
| 26.07. | Public: 1. Fuzzy-Glitch: A Practical Ring Oscillator Based Clock Glitch Attack 2. PropFuzz - An IT-Security Fuzzing Framework for Proprietary ICS Protocols | 1. Johannes Obermaier, AISEC 2. Matthias Niedermaier, Hochschule Augsburg |
| 19.07. | Public: 1. The Low Area Probing Detector as a Countermeasure against Invasive Attacks 2. Generation of unpredictable bits based on the combination of RRAMs devices for hardware security applications | 1. Michael Weiner, Simons Voss, 2. Prof. Salvador Manich, UPC Barcelona |
| 12.07. | Public: Shedding too much Light on a Microcontroller's Firmware Protection | Johannes Obermaier, AISEC |
| 28.06. | Public: Highly Ecient Implementation of Physical Unclonable Functions on FPGAs | Stefan Gehrer, Bosch |
| 21.06. | Public: Exploiting Bus Communication to Improve Cache Attacks on Systems-on-Chips | Mathieu Gross, TUM |
| 31.05. | Public: 1. ChaCha20-Poly1305 Authenticated Encryption for High-Speed Embedded IoT Applications 2. EM Attack on BCH-based Error Correction for PUFs | 1. Fabrizio De Santis,TUM 2. Lars Tebelmann, TUM |
| 17.05. | CANCELED Public: EM Attack on BCH-based Error Correction for PUFs | Lars Tebelmann, TUM |
| 19.04. | Public:1. Automatic Generation of High-Performance Modular Multipliers for Arbitrary Mersenne Primes on FPGAs 2. Take a Moment and have some t: Hypothesis Testing on Raw PUF Data | 1. Philipp Koppermann, Fraunhofer AISEC 2. Vincent Immler, Fraunhofer AISEC |
| 05.04. | Public: 1. Title: Low-cost Setup for Localized Semi-invasive Optical Fault Injection Attacks 2. Dissecting Leakage Resilient PRFs | 1. Oscar Guillen, G&D 2. Florian Unterstein, Fraunhofer AISEC |
| 22.03. | Public: 1. Towards Post-quantum Security for IoT Endpoints with NTRU 2. ChaCha20-Poly1305 Authenticated Encryption for High-Speed Embedded IoT Applications | 1. Johanna Sepulveda, TUM 2. Fabrizio De Santis, TUM |
| 08.03. | Public: Compromising FPGA SoCs using Malicious Hardware Blocks | Nisha Jacobs, Fraunhofer AISEC |
| 22.02. | Public: Automated Detection of Instruction Cache Leaks in RSA Software Implementations | Andreas Zankl, Fraunhofer AISEC |
| 01.02. | Intern: Bericht Forschungsaufenthalt USA | Andreas Zankl, Fraunhofer AISEC |
| 11.01. | Intern: | 1.+2. Philipp Koppermann 3. Ludwig Kürzinger 4. Florian Wilde 5. Matthias Hiller 6. Andreas Zankl 7. Johanna Sepulveda 8. Vincent Immler |
PhD Seminar 2016
| 07.12. | Intern: Automated Synthesis of Efficient Circuits for Secure Computation | Ghada Dessouky |
| 09.11. | Public: 1. Non-minimal Security-aware Routing for Zone-based data Protection in Multi-Processor System-on-Chips 2. Circuit Clustering Methods for Netlist Reverse Engineering 3. Spatial Correlationsin Physical Unclonable Functions | 1. Johanna Sepulveda, TUM 2. Johanna Baehr, TUM 3. Florian Wilde, TUM |
| 26.10. | Public: 1. Squeezing Polynomial Masking in Tower Fields 2. Side-Channel Leakage Models for IoT Processors | 1. Fabrizio De Santis, TUM 2. Hermann Seuschek, TUM |
| 12.10. | Intern: 1. Towards Side-Channel Secure Firmware Updates - A Minimalist Anomaly Detection Approach 2. Online Reliability Testing for PUF Key Derivation | 1. Oscar Guillen, TUM 2. Aysun Önalan |
| 21.09. | Public: Towards Efficient Evaluation of a Time-Driven Cache Attack on Modern Processors | Andreas Zankl, Fraunhofer AISEC |
| August | no seminar scheduled | |
| 27.07. | Public: 1. X25519 Hardware Implementation for Low-Latency Applications + 2. Attack on a DFA protected AES by simultaneous laser fault injections | 1. Philipp Koppermann, Fraunhofer AISEC + 2. Bodo Selmke, Fraunhofer AISEC |
| 21.07.(neuer Termin) | Public: 1. Fast and Reliable PUF Response Evaluation from Unsettled Bistable Rings + 2. Defending Cache Memory against Cold-Boot Attacks Boosted by Power or EM Radiation Analysis | 1. Robert Hesselbarth, Fraunhofer AISEC + 2. Salvador Manich, Universitat Politecnica de Barcelona (UPC) |
| 29.06. | TUM intern: 1. MaskVer: A Tool Helping Designers Detect Flawed Masking Implementations 2. Bericht zum CryptArchi Workshop | 1. Michael Tempel-meier, TUM + 2. Prof. Jens-Peter Kaps, GMU Washington |
| 15.06. | Public: Towards Risk Aware NoCs for Data Protection in MPSoCs | Johanna Sepulveda, TUM |
| 23.05. | Public: Analyzing the Security and Privacy of Cloud-based Video Surveillance Systems | Johannes Obermaier + Martin Hutle, Fraunhofer AISEC |
| 04.05. | Public: Enhancing Fault Emulation of Transient Faults by Separating Combinational and Sequential Fault Propagation | Ralph Nyberg, Fraunhofer AISEC |
| 20.04. | Public: An Area-Optimized Serial Implementation of ICEPOLE Authenticated Encryption Schemes | Michael Tempelmeier, TUM |
| 06.04. | no Seminar scheduled | |
| 16.03. | no Seminar scheduled | |
| 02.03. | Public: Notifying Memories: a case-study on Data-Flow Applications with NoC Interfaces Implementation | Johanna Sepulveda, TUM |
| 17.02. | TUM intern: Practical Evaluation of Code Injection in Encrypted Firmware Updates | Oscar Guillen, TUM |
| 03.02. | Public: Exploring RRAMs for ICs Security Applications | Daniel Arumí, Universitat Politecnica de Barcelona (UPC) |
| 20.01. | 17:30 TUM intern: HOST Review | PhD Candidates TUM + Fraunhofer AISEC |
PhD Seminar 2015
| 16.12. | Public: Safe and Secure I/O Sharing for Mixed-Criticality Embedded Real-Time Systems for Avionics | Daniel Münch, Airbus | |
| 02.12. | Public: Efficient and Flexible NoC-Based Group Communication for Secure MPSoCs | Martha Johanna Sepulveda Florez, TUM | |
| 18.11. | Public: Using the reconfigurability of modern FPGAs for highly efficient PUF-based key generation | Stefan Gehrer, Bosch | |
| 04.11. | Public: Privacy-preserving Data Analytics on Social Networks: Limits of De-anonymizablity | Prof. Negar Kiyavash | |
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28.10. | Public: 1. A Static DLM Analyzer to Assure Correct Information Flow in C, 2. seTPM: Towards Flexible Trusted Computing on Mobile Devices based on GlobalPlatform Secure Elements | 1. Kevin Müller, Airbus + 2. Sergej Proskurin | |
| 21.10. | Public: Precise Laser Fault Injections into 90nm and 45nm SRAM-cells | Bodo Selmke, Fraunhofer AISEC | |
| 30.09. | Public: A Lightweight Framework for Cold Boot Based Forensics on Mobile Devices | Manuel Huber, Fraunhofer AISEC | |
| 29.07. | Public: 1. A petite and power saving design for the AES S-Box 2. Side-Channel Leakage Models for RISC Instruction Set Architectures from Empirial Date | 1. Markus Wamser, TUM + 2. Hermann Seuschek, TUM | |
| 01.07. | ABGESAGT Public: Attack Surface and Vulnerability Assessment of Automotive Electronic Control Units | Martin Salfer, BMW | |
| 22.06. | 17:30 Public: Computational Fuzzy Commitment with a Noise-Avoiding Trapdoor | Mandel Yu, Firma Verayo, USA | |
| 11.06. | Public: 65nm ASIC Design of a Probe Attempt Detector Prototype | Prof. Salvador Manich Bou, UPC Barcelona | |
| 27.05. | Public: Detecting Fingerprinted Data in TLS Traffic | Konstantin Böttinger, Fraunhofer AISEC | |
| 06.05. | TUM intern: HiPeC - High Performance Cryptograhic Service for Heterogeneous Network-on-Chip Systems | Hermann Seuschek, TUM | |
| 15.04. | es findet kein PhD Seminar statt | ||
| 01.04. | TUM intern: Improving Non-Profiled Attacks on Exponentiations based on Clustering and Extracting Leakage from Multi-Channel High-Resolution EM Measurements | Robert Specht, Fraunhofer AISEC | |
| 18.03. | TUM intern: Über eine Schieberegister- basierte Variante von Canrighs S-Box für den AES | Markus Wamser, TUM | |
| 11.03. | Public: Low Leakage Coding for Physical Unclonable Functions | Matthias Hiller, TUM | |
| 18.02. | Kein PhD Seminar | ||
| 04.02. | Public: On Cache Timing Attacks Considering Multi-Core Aspects in Virtualized Embedded Systems | Benjamin Weggenmann, Fraunhofer AISEC | |
| 21.01. | TUM-intern: A Systematic Study of Lightweight Hash Functions on FPGAs | Matthias Hiller, TUM | |
| 07.01. | 17:30: TUM-intern: Diskussion Paper | PhD Candidates TUM + Fraunhofer AISEC |
PhD Seminar 2014
| 03.12. | TUM-intern: Investigating Measurement Methods for High-Resolution Electromagnetic Field Side-Channel Analysis | Robert Specht, Fraunhofer AISEC |
| 19.11. | Public: 1. Reconfigurable PUFs for FPGA-based SoCs 2. Statistic-Based Security Analysis of Ring Oscillator PUFs | 1. Stefan Gehrer, Bosch 2. Florian Wilde, TUM |
| 05.11. | Public: Evaluation of Bistable Ring PUFs Using Single Layer Neural Networks | Dieter Schuster, Fraunhofer AISEC |
| 22.10. | TUM-intern: Bericht zur CHES Konferenz | Johann Heyszl Fraunhofer AISEC |
| 08.10. | TUM intern: On Efficient Leakage-Resilient Pseudorandom Functions with Hard-to-Invert Leakages | Fabrizio De Santis, TUM |
| 17.09. | TUM intern: Risk Management in Embedded Devices using Metering Applications as Example | Oscar Guillen TUM |
| 23.07. | Öffentlich: 1. Ultra-small designs for inversion-based S-Boxes + 2. Closing the Gap Between Speed and Configurability of Multi-Bit Fault Emulation Environments for Security and Safety-Critical Designs | 1. Markus Wamser TUM, 2. Ralph Nyberg, Fraunhofer AISEC |
| 09.07. | Öffentlich: 1. Seesaw: An Area-Optimized FPGA Viberti Decoder for PUFs 2. Design of an Interleaved Oscillation Canceller Filter (IOCF) for a Bistable Ring PUF | 1. Matthias Hiller, TUM 2. Salvador Manich, UPC Barcelona |
| 25.06. | Öffentlich:Security Evaluation Supported by Information Security Mechanisms | Jakub Breier, Nanyang Technological University, Singapur |
| 11.06. | Öffentlich: Discussion remaining topics on the past PhD Seminar (28.05.2014 DATE Conference) | PhD Candidates TUM + Fraunhofer AISEC |
| 28.05. | Öffentlich: Discussion on the past DATE Conference | PhD Candidates TUM + Fraunhofer AISEC |
| 07.05. | Öffentlich: A Low Area Probing Detector for Security ICs | Michael Weiner, TUM |
| 23.04. | Öffentlich:On MILS I/O Sharing Targeting Avionic Systems | Kevin Müller, EADS Innovation Works |
| 19.03. | TUM intern: On Bistable Ring Response Evaluation | Robert Hesselbarth, Fraunhofer AISEC |
| 05.03
| Öffentlich:1. Increasing the Efficiency of Syndrome Coding for PUFs with Helper Data Compression 2. Discussion of Programmable Lines on FPGAs | Matthias Hiller, TUM Michael Weiner, TUM |
PhD Seminar 2013
| 11.12. | TUM intern: Balanced Routing of Dual-Rail Signals for DPA-Resistant Logic Styles in Xilinx FPGAs | Vincent Immler, Fraunhofer AISEC |
| 30.10. | TUM intern: Crypto-Prozessor with Secure Key Management | Lubos Gaspar, UCL, Belgium |
| 20.11. | TUM-intern: On the Relationship Between Correlation Power Analysis and the Stochatic Approach: an ASIC Designer Perspective | Fabrizio De Santis TUM, |
| 06.11. | öffentlich: Hardware Trojans: Just the Tip of the Iceberg | Nisha Jacob, Fraunhofer AISEC |
| 23.10. | öffentlich: Breaking through Fixed PUF Block Limitations with Differential Sequence Coding and Convolutional Codes | Matthias Hiller, TUM |
| 09.10. | TUM-intern: CHES and PROOFS 2013 - Summary and Hot Topics | Fabrizio De Santis TUM, Johann Heyszl Fraunhofer AISEC |
| 10.09. | öffentlich: Manipulationssensible Kopierschutzfolie | Maxim Henning, Fraunhofer AISEC |
| 07.08. | öffentlich: Pre-Selection of PUF Cells + PUF Cell Simulation / Microcontroller PUF | Maximilian Hofer + Christoph Böhm, Infineon Graz |
| 17.07. | TUM-intern: Security Analysis of a widely developed Locking System | Michael Weiner, TUM |
| 10.07. | öffentlich: 1.Security based on Decision - Theroy - How to find a Worst-Case-Optimal Protection? 2. Differential Scan-Path. A Novel Solution for Secure Design-for- Testability | 1.Stefan Rass, Universität Klagenfurt 2. Salvador Manich, UPC Barcelona |
| 03.07. | öffentlich: A new Model of Estimating Bit Error Probabilities of Ring-Oscillator PUFs | Matthias Hiller, TUM |
| 19.06. | TUM-intern: A Cycle-Accurate Coprocessor Prototyping Platform for System-on-Chip | Silvio Dragone, IBM Research GmbH |
| 05.06. | TUM-intern: Highlights of the Workshop on Applied Cryptography at Nanyang Technological University, Singapore in March 2013 | Marc Stöttinger, NTU und Matthias Hiller, TUM |
| 22.05. | TUM-intern: On Implementing Trusted Boot for Embedded Systems | Carsten Rolfes, Fraunhofer AISEC |
| 08.05. | öffentlich: Mutating Runtime Architectures as a Countermeasure Against Power Analysis Attacks | Marc Stöttinger, Nanyang Technological University, Singapur |
| 17.04. | öffentlich: Decreasing System Availability on a Avionic Multicore Proseccor Using Directly Assigned PCI Express Devices | Kevin Müller, EADS Innovation Works |
| 20.02. | TUM-intern: Die FPGA-basierte Fehleremulation, eine Entwicklung des HaVerl Projekts | Ralph Nyberg, Fraunhofer AISEC |
| 06.02. | Modeling of Bistable Inverter Rings to Improve the Design of Bistable Ring PUFs | Robert Hesselbarth, Fraunhofer AISEC |
| 23.01. | Obfuscation Survey | Philipp Zieris, Fraunhofer AISEC |
| 09.01. | Security Considerations of Information Flows in Avionic with focus on Modern Embedded COTS Hardware Computer Architectures and Operating Systems using MILS Approaches | Kevin Müller, EADS Innovation Works |
PhD Seminar 2012
| 12.12. | Konstruktion spezieller linearer Blockcodes aus 2-Bit-korrigierenden BCH-Codes | Christian Badack, Universität Potsdam |
| 14.11. | CARDIS Vortrag | Johann Heyszl, Fraunhofer AISEC |
| 24.10. | CHES 2012 Summary and Discussion of Hot Topics | Fabrizio De Santis TUM, Johann Heyszl Fraunhofer AISEC |
| 10.10. | CHES 2012 Summary and Discussion of Hot Topics | Fabrizio De Santis TUM, Johann Heyszl Fraunhofer AISEC |
| 26.09. | Evaluation of a Multi-Purpose Galois Field Accelerator | Hermann Seuschek, TUM, Michael Weiner, TUM |
| 05.09. | Attestation of Mobile Baseband Stacks | Steffen Wagner, Fraunhofer AISEC |
| 18.07. | Emerging trends to counteract physical attacks to cryptographic devices | Fabrizio De Santis, TUM |
| 04.07. | Security and CE Device Integration in an Automotive IP-based Communication Middleware | Alexandre Bouard, BMW Forschung und Technik |
| 20.06. | Reliability Bound and Channel Capacity of IBS-based Fuzzy Embedders | Matthias Hiller, TUM |
| 23.05. | Automated Web Emulation for Secure Operation of a Malware-Analysis Environment | Martin Brunner, Fraunhofer AISEC |
| 09.05. | Complementary IBS: Application Specific Error Correction for PUFs | Matthias Hiller, TUM |
| 25.04. | Detection of Probing Attempts in Secure IC's | Salvador Manich Bou, Universitat Politecnica de Barcelona (UPC) |
| 04.04. | Stuxnet und gezielte Angriffe gegen industrielle Kontrollsysteme | Heiko Patzlaff, Siemens AG Corporate Technology |
| 15.02. | A Cache Timing Attack on AES in Virtualization Environments | Michael Weiß, Fraunhofer AISEC |
| 01.02. | Localized Electromagnetic Analysis of Cryptographic Implementations | Johann Heyszl, Fraunhofer AISEC |
| 18.01. | Linear regression models for side-channel analysis | Fabrizio De Santis, TUM |
PhD Seminar 2011
| 14.12. | Evolution of Lightweight Cryptography | Axel Poschmann, Nanyang Technological University (NTU), Singapore |
| 23.11. | Identitätsmanagement in kontextsensitiven Umgebungen – entitätszentriert und mehrseitig sicher | Mario Hoffmann, Fraunhofer AISEC |
| 19.10. | Secure storage of cryptographic keys on vehicular networks | Alexander Kiening, Fraunhofer AISEC |
| 05.10. | Semi-invasive EM Attack on FPGA RO PUFs and Countermeasures | Dominik Merli, Fraunhofer AISEC |
| 21.09. | A Cost-Effective FPGA-based Fault Simulation Environment | Johann Heyszl, Fraunhofer AISEC |
| 20.07. | An Attack on PUF-based Session Key Exchange and a Hardware-based Countermeasure: Erasable PUFs | Ulrich Rührmair |
| 06.07. | Page-based Runtime Integrity Protection of User and Kernel Code | Sascha Wessel, Fraunhofer AISEC |
| 01.06. | Side-Channel Analysis of PUFs and Fuzzy Extractors | Dominik Merli, Fraunhofer AISEC |
| 18.05. | Ubiquitous Personal Information Management | Jens Heider, Fraunhofer AISEC |