Kundu, Debraj; Tseng, Tsun-Ming; Yamashita, Shigeru; Schlichtmann, Ulf: Loading-Aware Mixing-Efficient Sample Preparation on Programmable Microfluidic Device. Design, Automation and Test in Europe (DATE), 2025 mehr…BibTeX
Chen, Yan-Ting; Zheng, Zhidan; Fang, Shao-Yun; Tseng, Tsun-Ming; Schlichtmann, Ulf: CPONoC: Critical Path-aware Physical Implementation for Optical Networks-on-Chip. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2025 mehr…BibTeX
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Lian, Meng; Yang, Shucheng; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf: Dynamic Topology-Aware Flow Path Construction and Scheduling Optimization for Multilayered Continuous-Flow Microfluidic Biochips. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2025 mehr…BibTeX
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Qiu, Ruidi; Zhang, Grace Li; Drechsler, Rolf; Schlichtmann, Ulf; Li, Bing: CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design. Design, Automation and Test in Europe (DATE), 2025 mehr…BibTeX
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Zhang, Yushen; Rašeta, Dragan; Tseng, Tsun-Ming; Schlichtmann, Ulf: 3M-DeSyn: Design Synthesis for Multi-Layer 3D-Printed Microfluidics with Timing and Volumetric Control. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2025 mehr…BibTeX
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Zheng, Zhidan; Chang, You-Jen; Cheng, Liaoyuan; Tseng, Tsun-Ming; Schlichtmann, Ulf: A Backup Resource Customization and Allocation Method for Wavelength-Routed Optical Networks-on-Chip Topologies. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2025 mehr…BibTeX
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Zheng, Zhidan; Lian, Meng; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf: SRing: A Sub-Ring Construction Method for Application-Specific Wavelength-Routed Optical NoCs. Design, Automation and Test in Europe (DATE), 2025 mehr…BibTeX
2024
Zeitschriftenartikel
Eldebiky, Amro; Zhang, Grace Li; Böcherer, Georg; Li, Bing; Schlichtmann, Ulf: CorrectNet+: Dealing with HW Non-Idealities in In-Memory-Computing Platforms by Error Suppression and Compensation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024 mehr…BibTeX
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Lian, Meng; Peng, Hu; Li, Mengchu; Zhang, Yushen; Tseng, Tsun-Ming; Wolfrum, Bernhard; Schlichtmann, Ulf: Manufacturing Cycle Time Optimization for Inkjet-Printed Electronics. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024 mehr…BibTeX
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Liang, Siyuan; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf; Ho, Tsung-Yi: Combinatorial-Coding-Based High-Performance Microfluidic Control Multiplexer: Design, Synthesis, and Adaptation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024 mehr…BibTeX
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Chen, Chuangtao; Zhang, Li; Yin, Xunzhao; Zhuo, Cheng; Schlichtmann, Ulf; Li, Bing: Computational and Storage Efficient Quadratic Neurons for Deep Neural Networks. Design, Automation and Test in Europe (DATE), 2024 mehr…BibTeX
Cheng, Liaoyuan; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf: Minimizing Worst-Case Data Transmission Cycles in Wavelength-Routed Optical NoC through Bandwidth Allocation. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2024 mehr…BibTeX
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Emrich, Karsten; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Towards Coverage Analysis for Translating Instruction Set Simulators. RISC-V Summit Europe, 2024 mehr…BibTeXWWW
Emrich, Karsten; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf;: A Concise, Architecture-Focused ASIP Modeling Approach for Instruction Set Simulators. Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV), 2024 mehr…BibTeX
Fang, Shao-Yun; Liu, Yi-Yu; Cheng, Chung-Kuan; Tseng, Tsun-Ming: Overview of 2024 CAD Contest at ICCAD. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2024 mehr…BibTeX
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Geier, Johannes; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Techniques and Tools for Fast Fault Injection Simulations of RISC-V Processors at RTL. RISC-V Summit Europe, 2024 mehr…BibTeXWWW
Hoffman, Alexander; Fnayou, Ala; Smirnov, Fedor; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: MuDSE: GA-ILP-based Framework for Automated Deployment of Multiple DNNs on Heterogeneous Mixed-Criticality Systems. 2024 IEEE International Conference on Omni-layer Intelligent Systems (COINS), IEEE, 2024, 1-8 mehr…BibTeX
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Hoffman, Alexander; Schlichtmann, Ulf; Mueller-Gritschneder, Daniel: MuNAS: TinyML Network Architecture Search Using Goal Attainment and Reinforcement Learning. 2024 13th Mediterranean Conference on Embedded Computing (MECO), IEEE, 2024, 1-8 mehr…BibTeX
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Huang, Qingrong; Barkam, Hamza Errahmouni; Yang, Zeyu; Yang, Jianyi; Kämpfe, Thomas; Ni, Kai; Zhang, Li; Li, Bing; Schlichtmann, Ulf; Imani, Mohsen; Zhuo, Cheng; Yin, Xunzhao: A FeFET-based Time-Domain Associative Memory for Multi-bit Similarity Computation. Design, Automation and Test in Europe (DATE), 2024 mehr…BibTeX
Ibrahimpasic, Tarik; Zhang, Li; Brunner, Michaela; Sigl, Georg; Li, Bing; Schlichtmann, Ulf: ScanCamouflage: Obfuscating Scan Chains with Camouflaged Sequential and Logic Gates. Design, Automation and Test in Europe (DATE), 2024 mehr…BibTeX
Jones, Jefferson Parker; van Kempen, Philipp; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: muRISCV-NN: Improving RISC-V Vector Extension Performance with a Kernel Library. RISC-V Summit Europe, 2024 mehr…BibTeXWWW
Qiu, Ruidi; Eldebiky, Amro; Zhang, Li; Yin, Xunzhao; Zhuo, Cheng; Schlichtmann, Ulf; Li, Bing: OplixNet: Towards Area-Efficient Optical Split-Complex Networks with Real-to-Complex Data Assignment and Knowledge Distillation. Design, Automation and Test in Europe (DATE), 2024 mehr…BibTeX
Qiu, Ruidi; Zhang, Grace Li; Drechsler, Rolf; Schlichtmann, Ulf; Li, Bing: AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design. ACM/IEEE International Symposium on Machine Learning for CAD (MLCAD), ACM, 2024, 1-10 mehr…BibTeX
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Schirmer, Michael; Maier, David; Geier, Johannes: XCP2: An XCP-Proxy Server for Concurrent Multinode XCP Access. 2024 13th Mediterranean Conference on Embedded Computing (MECO), IEEE, 2024, 1-5 mehr…BibTeX
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Xu, Kangwei; Zhang, Grace Li; Schlichtmann, Ulf; Li, Bing: Logic Design of Neural Networks for High-Throughput and Low-Power Applications. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2024 mehr…BibTeX
Xu, Kangwei; Zhang, Grace Li; Yin, Xunzhao; Zhuo, Cheng; Schlichtmann, Ulf; Li, Bing: Automated C/C++ Program Repair for High-Level Synthesis via Large Language Models. Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, ACM, 2024, 1-9 mehr…BibTeX
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van Kempen, Philipp; Salmen, Mathis; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Towards Automated LLVM Support and Autovectorization for RISC-V ISA Extensions. RISC-V Summit Europe, 2024 mehr…BibTeXWWW
van Kempen, Philipp; Jones, Jefferson Parker; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: muRISCV-NN: Challenging Zve32x Autovectorization with TinyML Inference Library for RISC-V Vector Extension. Proceedings of the 21st ACM International Conference on Computing Frontiers Workshops and Special Sessions, ACM, 2024 mehr…BibTeX
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Deng, Hui: Implementation and Analysis of the One-Pass Architectural Synthesis for Continuous-Flow Microfluidic Lab-on-a-Chip Systems. Projektarbeit, 2024 mehr…BibTeX
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Guan, Jianhao: Simulation and Analysis of Typical Wavelength-Routed Optical Networks-on-Chip Routers Based on Optsim. Projektarbeit, 2024 mehr…BibTeX
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Haskaj, Rei: Analysis of Wavelength Usage with Multicast in Wavelength-Routed Optical Networks-on-Chip. Projektarbeit, 2024 mehr…BibTeX
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Häringer, Maximilian: Enhancing Signal Quality in Wavelength-Routed Optical Ring Networks-on-Chip via Simulation-Guided Power Compensation and Wavelength Configuration. Projektarbeit, 2024 mehr…BibTeX
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Ji, Zijie: A Power-Aware and Scalable Multi-Topology Design Method for Large-Scale Wavelength-Routed Optical Networks-on-Chip. Bachelorarbeit, 2024 mehr…BibTeX
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Kedia, Karan; Schroeder, Guenther : Buffering strategy and floorplan optimization for feedthroughs in a partition. Projektarbeit, 2024 mehr…BibTeX
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Laurin Rippel: Development of an Online ONoC (Optical Network-on-Chip) Design Platform. Bachelorarbeit, 2024 mehr…BibTeX
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Witteler, Benedikt: From Simulation to RVV Hardware: Evaluating the muRISCV-NN TinyML Inference Library on the CanMV K230 Platform. Projektarbeit, 2024 mehr…BibTeX
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2023
Zeitschriftenartikel
Bellarmino, Nicolò; Cantoro, Riccardo; Huch, Martin; Kilian, Tobias; Martone, Raffaele; Schlichtmann, Ulf; Squillero, Giovanni: A Multi-Label Active Learning Framework for Microcontroller Performance Screening. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023 mehr…BibTeX
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Chen, Tinghuan; Zhang, Li; Yu, Bei; Li, Bing; Schlichtmann, Ulf: Machine Learning in Advanced IC Design: A Methodological Survey. IEEE Design & Test 40 (1), 2023, 17-33 mehr…BibTeX
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Gao, Di; Yang, Zeyu; Huang, Qingrong; Zhang, Li; Yin, Xunzhao; Li, Bing; Schlichtmann, Ulf; Zhuo, Cheng: BRoCoM: A Bayesian Framework for Robust Computing on Memristor Crossbar. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 42 (7), 2023, 2136-2148 mehr…BibTeX
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Huang, Xing; Pan, Youlin; Chen, Zhen; Guo, Wenzhong; Wang, Lu; Li, Qingshan; Wille, Robert; Ho, Tsung-Yi; Schlichtmann, Ulf: Design Automation for Continuous-Flow Lab-on-a-Chip Systems: A One-Pass Paradigm. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 42 (1), 2023, 327 -- 331 mehr…BibTeX
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Kilian, Tobias; Tille, Daniel; Huch, Martin; Hanel, Markus; Schlichtmann, Ulf: Performance Screening using Functional Path Ring Oscillators. IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2023 mehr…BibTeX
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Li, Mengchu; Zhang, Yushen; Lee, Ju Young; Gasvoda, Hudson; Araci, Ismail Emre; Tseng, Tsun-Ming; Schlichtmann, Ulf: Integrated Test Module Design for Microfluidic Large-Scale Integration. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 42 (6), 2023, 1939 - 1950 mehr…BibTeX
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Schlichtmann, Ulf; Yu, Bei; Li, Bing; Gal, Raviv: Guest Editors’ Introduction: Special Issue on Machine Learning for CAD / EDA. IEEE Design and Test, 2023 mehr…BibTeX
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Truppel, Alexandre; Tseng, Tsun-Ming; Schlichtmann, Ulf: Accurate Infinite-order Crosstalk Calculation for Optical Networks-on-Chip. IEEE/OSA Journal of Lightwave Technology (JLT) 41 (1), 2023, 4 - 16 mehr…BibTeX
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Yin, Xunzhao; Qian, Yu; Imani, Mohsen; Ni, Kai; Li, Chao; Zhang, Li; Li, Bing; Schlichtmann, Ulf; Zhuo, Cheng: Ferroelectric Ternary Content Addressable Memories for Energy Efficient Associative Search. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 42 (4), 2023, 1099-1112 mehr…BibTeX
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Ahmadifarsani, Samira; Stahl, Rafael; van Kempen, Philipp; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Towards Rapid Exploration of Heterogeneous TinyML Systems using Virtual Platforms and TVM's UMA. Proceedings of the 2023 Workshop on Compilers, Deployment, and Tooling for Edge AI, ACM, 2023 mehr…BibTeX
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Bellarmino, Nicolò; Cantoro, Riccardo; Huch, Martin; Kilian, Tobias; Schlichtmann, Ulf; Squillero, Giovanni: Feature selection for cost reduction in MCU performance screening. 24th IEEE Latin-American Test Symposium (LATS2023), 2023 mehr…BibTeX
Bellarmino, Nicolò; Cantoro, Riccardo; Huch, Martin; Kilian, Tobias; Schlichtmann, Ulf; Squillero, Giovanni: Semi-Supervised Deep Learning for Microcontroller Performance Screening. IEEE European Test Symposium ETS, 2023 mehr…BibTeX
Blümm, Christian; Liu, Bo; Rahman, Talha; Li, Bing; Schlichtmann, Ulf; Calabrò, Stefano: Towards Neural Network Equalizer Implementations for IM/DD Transceivers. OptoElectronics and Communications Conference (OECC), 2023 mehr…BibTeX
Chen, Wei-Lun; Gu, Fang-Yi; Lin, Ing-Chao; Zhang, Li; Li, Bing; Schlichtmann, Ulf: A Novel and Efficient Block-Based Programming for ReRAM-Based Neuromorphic Computing. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2023 mehr…BibTeX
Eldebiky, Amro; Böcherer, Georg; Schaedler, Maximilian; Calabrò, Stefano; Li, Bing; Schlichtmann, Ulf: Implementation of a Robust and Power-Efficient Nonlinear 64-QAM Demapper using In-Memory Computing. Optical Fiber Communication Conference (OFC), 2023 mehr…BibTeX
Eldebiky, Amro; Li, Bing; Zhang, Li: NearUni: Near-Unitary Training for Efficient Optical Neural Networks. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2023 mehr…BibTeX
Eldebiky, Amro; Zhang, Li; Böcherer, Georg; Li, Bing; Schlichtmann, Ulf: CorrectNet: Robustness Enhancement of Analog In-Memory Computing for Neural Networks by Error Suppression and Compensation. Design, Automation and Test in Europe (DATE), 2023 mehr…BibTeXWWW
Eldebiky, Amro; Zhang, Li; Li, Bing: Countering Uncertainties in In-Memory-Computing Platforms with Statistical Training, Accuracy Compensation and Recursive Test. Design, Automation and Test in Europe (DATE), 2023 mehr…BibTeX
Geier, Johannes; Auer, Lukas; Mueller-Gritschneder, Daniel; Sharif, Uzair; Schlichtmann, Ulf: CompaSeC: A Compiler-Assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V. Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASPDAC ), Association for Computing Machinery, 2023 mehr…BibTeX
Geier, Johannes; Mueller-Gritschneder, Daniel: vRTLmod: An LLVM Based Open-Source Tool to Enable Fault Injection in Verilator RTL Simulations. Proceedings of the 20th ACM International Conference on Computing Frontiers (CF '23), Association for Computing Machinery, 2023 mehr…BibTeX
Ji, Weiqing; Yao, Hailong; Ho, Tsung-Yi; Schlichtmann, Ulf; Jin, Xia: GAT-based Concentration Prediction for Random Microfluidic Mixers with Multiple Input Flow Rates. ACM Great Lakes Symposium on VLSI (GLSVLSI), 2023 mehr…BibTeX
Kappes, Johannes; Kunzelmann, Robert; Emrich, Karsten; Foik, Conrad; Mueller-Gritschneder, Daniel; Ecker, Wolfgang: Effective Processor Model Generation from Instruction Set Simulator to Hardware Design. 2023 IEEE Nordic Circuits and Systems Conference (NorCAS), IEEE, 2023 mehr…BibTeX
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Lian, Meng; Zhang, Yushen; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf: FXT-Route: Efficient High-Performance PCB Routing with Crosstalk Reduction Using Spiral Delay Lines. ACM/SIGDA International Symposium on Physical Design (ISPD), 2023 mehr…BibTeX
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Liang, Siyuan; Lian, Meng; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf; Ho, Tsung-Yi: ARMM: Adaptive Reliability Quantification Model of Microfluidic Designs and Its Graph-Transformer-Based Implementation. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2023 mehr…BibTeX
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Lin, Ing-Chao; Wang, Jie-Shih; Chen, Yu-Guang; Schlichtmann, Ulf: Aging-Aware Task Deployment of Heterogeneous Multicore System. ITG/GMM/GI Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2023 mehr…BibTeX
Liu, Bo; Blümm, Christian; Calabrò, Stefano; Li, Bing; Schlichtmann, Ulf: Area-Efficient Neural Network CD Equalizer for 4x200Gb/s PAM4 CWDM4 Systems. Optical Fiber Communication Conference (OFC), 2023 mehr…BibTeX
Liu, Bo; Blümm, Christian; Calabrò, Stefano; Li, Bing; Schlichtmann, Ulf: Area-Efficient Hardware Parallelization of Neural Network CD Equalizers for 4×200 Gb/s PAM4 CWDM4 Systems. European Conference on Optical Communication (ECOC), 2023 mehr…BibTeX
Mettler, Marcel; Rapp, Martin; Khdr, Heba; Mueller-Gritschneder, Daniel; Henkel, Jörg; Schlichtmann, Ulf: MonTM: Monitoring-based Thermal Management for Mixed-Criticality Systems. 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2023) ( Open Access Series in Informatics (OASIcs) ), Schloss Dagstuhl -- Leibniz-Zentrum für Informatik , 2023 mehr…BibTeX
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Putz, Maximilian; Ludwig, Matthias; Lippmann, Bernhard; Graeb, Helmut: PLaNe: Reverse Engineering of Planar Layouts to Gate-Level Netlists. 2023 IEEE Physical Assurance and Inspection of Electronics (PAINE), IEEE, 2023 mehr…BibTeX
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Stahl, Rafael; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Fused Depthwise Tiling for Memory Optimization in TinyML Deep Neural Network Inference. tinyML Research Symposium, 2023 mehr…BibTeX
Sun, Wenhao; Zhang, Li; Gu, Huaxi; Li, Bing; Schlichtmann, Ulf: Class-based Quantization for Neural Networks. Design, Automation and Test in Europe (DATE), 2023 mehr…BibTeX
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Sun, Wenhao; Zhang, Li; Yin, Xunzhao; Zhuo, Cheng; Gu, Huaxi; Li, Bing; Schlichtmann, Ulf: SteppingNet: A Stepping Neural Network with Incremental Accuracy Enhancement. Design, Automation and Test in Europe (DATE), 2023 mehr…BibTeXWWW
Zhang, Yushen; Tseng, Tsun-Ming; Schlichtmann, Ulf: Ein kostengünstiges, tragbares Open-Source-Sensorboard mit drahtloser Kommunikation und Fluoreszenzdetektion zur farbmetrischen Detektion für mikrofluidische Anwendungen. VDE/VDI-GMM MikroSystemTechnik Kongress, 2023 mehr…BibTeX
Zhang, Yushen; Tseng, Tsun-Ming; Schlichtmann, Ulf: Eine interaktive Design-Plattform für 3D-gedruckte mehrlagige Mikrofluidikchips mit Design-for-Manufacturing-Funktion. VDE/VDI-GMM MikroSystemTechnik Kongress, 2023 mehr…BibTeX
Zheng, Zhidan; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf: XRing: A Crosstalk-Aware Synthesis Method for Wavelength-Routed Optical Ring Routers. Design, Automation and Test in Europe (DATE), 2023 mehr…BibTeX
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van Kempen, Philipp; Emrich, Karsten; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Automated Generation of a RISC-V LLVM Toolchain for Custom MACs. RISC-V Summit Europe, 2023 mehr…BibTeXWWW
van Kempen, Philipp; Stahl, Rafael; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: MLonMCU: TinyML Benchmarking with Fast Retargeting. Proceedings of the 2023 Workshop on Compilers, Deployment, and Tooling for Edge AI, ACM, 2023 mehr…BibTeX
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Adisoemarta, Antonius Edwin: JavaScript STL-Library for Online Microfluidics Programming Platform. Projektarbeit, 2023 mehr…BibTeX
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Peng, Jiahui: A Two-Step Algorithm for Microfluidic Large-Scale Integration Test Module Design. Projektarbeit, 2023 mehr…BibTeX
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Wang, Minxing: Routing Strategy for Multi-Layer Microfluidic Devices Using ILP. Masterarbeit, 2023 mehr…BibTeX
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2022
Bücher / Beiträge zu Sammelbänden
Mueller-Gritschneder, Daniel; Schlichtmann, Ulf; Listl, Alexandra; Mettler, Marcel; Zhang, Li: Generation of Distributed Monitors and Run-Time Verification of Invasive Applications – 8. In: Jürgen Teich, Jörg Henkel, Andreas Herkersdorf (Hrsg.): Invasive Computing. FAU University Press, 2022, 229 -- 253 mehr…BibTeX
Zeitschriftenartikel
Abel, Inga; Neuner, Maximilian; Graeb, Helmut: A Hierarchical Performance Equation Library for Basic Op-Amp Design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022 mehr…BibTeX
Huang, Xing; Ho, Tsung-Yi; Li, Zepeng; Liu, Genggeng; Wang, Lu; Li, Qingshan; Guo, Wenzhong; Li, Bing; Schlichtmann, Ulf: MiniControl 2.0: Co-Synthesis of Flow and Control Layers for Microfluidic Biochips With Strictly Constrained Control Ports. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022 mehr…BibTeX
Last, Felix; Schlichtmann, Ulf: Training PPA Models for Embedded Memories On a Low Data Diet. ACM Transactions on Design Automation of Electronic Systems, 2022 mehr…BibTeX
Listl, Alexandra; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Application-aware aging analysis and mitigation for SRAM Design-for-Reliability. Microelectronics Reliability 134, 2022 mehr…BibTeX
Mettler, Marcel; Rapp, Martin; Khdr, Heba; Mueller-Gritschneder, Daniel; Henkel, Jörg; Schlichtmann, Ulf: An FPGA-based Approach to Evaluate Thermal and Resource Management Strategies of Many-Core Processors. ACM Transactions on Architecture and Code Optimization 19 (3), 2022 mehr…BibTeX
Xiao, Moyuan; Tseng, Tsun-Ming; Schlichtmann, Ulf: Crosstalk-Aware Automatic Topology Customization and Optimization for Wavelength-Routed Optical NoCs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 41 (12), 2022, 5261 - 5274 mehr…BibTeX
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Yu, Hui-Chieh; Lin, Yu-Huei; Chen, Zhiyang; Li, Bing; Huang, Xing; Schlichtmann, Ulf; Ho, Tsung-Yi; Yao, Hailong: Contamination-Aware Synthesis for Programmable Microfluidic Devices. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022 mehr…BibTeX
Zhang, Li; Li, Bing; Huang, Xing; Yin, Xunzhao; Zhuo, Cheng; Hashimoto, Masanori; Schlichtmann, Ulf: VirtualSync+: Timing Optimization with Virtual Synchronization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022 mehr…BibTeX
Zhang, Yushen; Tseng, Tsun-Ming; Schlichtmann, Ulf: ColoriSens: An open-source and low-cost portable color sensor board for microfluidic integration with wireless communication and fluorescence detection. HardwareX 11, 2022 mehr…BibTeXWWW
Bellarmino, Nicolò; Cantoro, Riccardo; Huch, Martin; Kilian, Tobias; Schlichtmann, Ulf; Squillero, Giovanni: Microcontroller Performance Screening: Optimizing the Characterization in the Presence of Anomalous and Noisy Data. IEEE 28th International Symposium on On-Line Testing and Robust System Design (IOLTS 2022), 2022 mehr…BibTeX
Blümm, Christian; Liu, Bo; Li, Bing; Rahman, Talha; Hossain, Md Sabbir-Bin; Schaedler, Maximilian; Schlichtmann, Ulf; Kuschnerov, Maxim; Calabrò, Stefano: 800Gb/s PAM4 Transmission Over 10km SSMF Enabled by Low-Complex Duobinary Neural Network Equalization. European Conference on Optical Communication (ECOC), 2022 mehr…BibTeX
Brunner, Michaela; Ibrahimpasic, Tarik; Li, Bing; Zhang, Li; Schlichtmann, Ulf; Sigl, Georg: Timing Camouflage Enabled State Machine Obfuscation. IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE), 2022 mehr…BibTeX
Cai, Jiahao; Imani, Mohsen; Ni, Kai; Zhang, Li; Li, Bing; Schlichtmann, Ulf; Zhuo, Cheng; Yin, Xunzhao: Energy Efficient Data Search Design and Optimization Based on A Compact Ferroelectric FET Content Addressable Memory. ACM/IEEE Design Automation Conference (DAC), 2022 mehr…BibTeX
Eldebiky, Amro; Böcherer, Georg; Zhang, Li; Li, Bing; Schaedler, Maximilian; Calabrò, Stefano; Schlichtmann, Ulf: Power-Efficient and Robust Nonlinear Demapper for 64QAM Using in-Memory Computing. European Conference on Optical Communication (ECOC), 2022 mehr…BibTeX
Elnaggar, Rana; Servadei, Lorenzo; Mathur, Shubham; Wille, Robert; Ecker, Wolfgang; Chakrabarty, Krishnendu: Accurate and Robust Malware Detection: Running XGBoost on Runtime Data From Performance Counters. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022 mehr…BibTeX
Foik, Conrad; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: CorePerfDSL: A Flexible Processor Description Language for Software Performance Simulation. Forum on Specification and Design Languages (FDL), 2022 mehr…BibTeX
Gerlin, Nicolas; Kaja, Endri; Bora, Monideep; Devarajegowda, Keerthikumara; Stoffel, Dominik; Kunz, Wolfgang; Ecker, Wolfgang: Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection. International Conference on VLSI and System-on-Chip (VLSI-SoC), 2022 mehr…BibTeX
Graeb, Helmut: Analog Synthesis – The Deterministic Way. ACM/SIGDA International Symposium on Physical Design (ISPD), 2022 mehr…BibTeX
Herbst, Steven; Rutsch, Gabriel; Ecker, Wolfgang; Horowitz, Mark: An Open-Source Framework for FPGA Emulation of Analog/Mixed-Signal Integrated Circuit Designs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022 mehr…BibTeX
Ji, Weiqing; Guo, Xingzhuo; Pan, Shouan; Ho, Tsung-Yi; Schlichtmann, Ulf; Yao, Hailong: GNN-based Concentration Prediction for Random Microfluidic Mixers. ACM/IEEE Design Automation Conference (DAC), 2022 mehr…BibTeX
Kaja, Endri; Gerlin, Nicolas; Bora, Monideep; Devarajegowda, Keerthikumara; Stoffel, Dominik; Kunz, Wolfgang; Ecker, Wolfgang: MetaFS: Model-driven Fault Simulation Framework. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022 mehr…BibTeX
Kaja, Endri; Gerlin, Nicolas; Bora, Monideep; Rutsch, Gabriel; Devarajegowda, Keerthikumara; Stoffel, Dominik; Kunz, Wolfgang; Ecker, Wolfgang: Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation. International Conference on VLSI and System-on-Chip (VLSI-SoC), 2022 mehr…BibTeX
Kilian, Tobias; Ahrens, Heiko; Tille, Daniel; Huch, Martin; Schlichtmann, Ulf: A Layout-aware Selection Flow for Functional Path Ring Oscillators. ITG/GMM/GI Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2022 mehr…BibTeX
Kilian, Tobias; Hanel, Markus; Tille, Daniel; Huch, Martin; Schlichtmann, Ulf: Reducing Routing Overhead by Self-Enabling Functional Path Ring Oscillators. IEEE European Test Symposium ETS, 2022 mehr…BibTeX
Kilian, Tobias; Hanel, Markus; Tille, Daniel; Huch, Martin; Schlichtmann, Ulf: A Path Selection Flow for Functional Path Ring Oscillators using Physical Design Data. IEEE International Test Conference (ITC), 2022 mehr…BibTeX
Kilian, Tobias; Tille, Daniel; Huch, Martin; Schlichtmann, Ulf: Reducing Routing Overhead using Natural Loops. European Automotive Reliability, Test and Safety (eARTS) Workshop, 2022 mehr…BibTeX
Last, Felix; Yeni, Ceren; Schlichtmann, Ulf: Differentially Evolving Memory Ensembles: Pareto Optimization based on Computational Intelligence for Embedded Memories on a System Level. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2022 mehr…BibTeX
Liang, Siyuan; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf; Ho, Tsung-Yi: CoMUX: Combinatorial-Coding-Based High-Performance Microfluidic Control Multiplexer Design. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2022 mehr…BibTeX
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Lopera, Daniela Sanchez; Ecker, Wolfgang: Applying GNNs to Timing Estimation at RTL. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2022 mehr…BibTeX
Lück, Christian; Lopera, Daniela Sanchez; Wenzek, Sven; Ecker, Wolfgang: Industrial Experience with Open-Source EDA Tools. ACM/IEEE Workshop on Machine Learning for CAD, 2022 mehr…BibTeX
Prebeck, Sebastian Siegfried; Lawand, Wafic; Vaddeboina, Mounika; Ecker, Wolfgang: A Smart HW-Accelerator for Non-uniform Linear Interpolation of ML-Activation Functions. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2022 mehr…BibTeX
Shen, Duan; Zhang, Yushen; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf: Contamination-Free Switch Design and Synthesis for Microfluidic Large-Scale Integration. Design, Automation and Test in Europe (DATE), 2022 mehr…BibTeX
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Ye, Wenwen; Zhang, Li; Li, Bing; Schlichtmann, Ulf; Zhuo, Cheng; Yin, Xunzhao: Aging Aware Retraining for Memristor-based Neuromorphic Computing. The IEEE International Symposium on Circuits and Systems (ISCAS), 2022 mehr…BibTeX
Zhang, Li; Zhang, Shuhang; Li, Hai (Helen); Schlichtmann, Ulf: RRAM-based Neuromorphic Computing-Data Representation, Architecture, Logic, and Programming. Euromicro Conference on Digital Systems Design (DSD), 2022 mehr…BibTeX
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Chen, Xianer: Front-End Web Development of an Interactive Design Platform for Microfluidic IP Modules. Bachelorarbeit, 2022 mehr…BibTeX
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Cheng, Hui: Web Application for Layout Decomposition of Printing-Based Microfabrication. Bachelorarbeit, 2022 mehr…BibTeX
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Zhao, Wei: Exploration of high-throughput based on ring-structure for wavelength-routed optical networks-on-chips. Projektarbeit, 2022 mehr…BibTeX
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Girardi, Alessandro; Graeb, Helmut: Process-variation aware design optimization of an integrated microprobe detector. Analog Integrated Circuits and Signal Processing, 2021 mehr…BibTeX
Guo, Chuliang; Zhang, Li; Zhou, Xian; Zhang, Grace Li; Li, Bing; Qian, Weikang; Yin, Xunzhao; Zhuo, Cheng: A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-widths. ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special Issue on Cross-Layer System Design and Regular Papers, 2021 mehr…BibTeX
Huang, Xing; Pan, Youlin; Zhang, Li; Li, Bing; Guo, Wenzhong; Ho, Tsung-Yi; Schlichtmann, Ulf: PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021 mehr…BibTeX
Liu, Chunfeng; Huang, Xing; Li, Bing; Yao, Hailong; Pop, Paul; Ho, Tsung-Yi; Schlichtmann, Ulf: DCSA: Distributed Channel-Storage Architecture for Flow-Based Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40 (1), 2021, 115 -- 128 mehr…BibTeX
Mettler, Marcel; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: A Distributed Hardware Monitoring System for Runtime Verification on Multi-tile MPSoCs. ACM Transactions on Architecture and Code Optimization 18 (1), 2021, 1 -- 25 mehr…BibTeX
Sharif, Uzair; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: REPAIR: Control Flow Protection based on Register Pairing Updates for SW-Implemented HW Fault Tolerance. ACM Transactions on Embedded Computing Systems (TECS) 20 (70), 2021, 1-22 mehr…BibTeX
Stahl, Rafael; Hoffman, Alexander; Müller-Gritschneder, Daniel; Gerstlauer, Andreas; Schlichtmann, Ulf: DeeperThings: Fully Distributed CNN Inference on Resource-Constrained Edge Devices. International Journal of Parallel Programming, 2021 mehr…BibTeX
Zhang, Yushen; Tseng, Tsun-Ming; Schlichtmann, Ulf: Portable All-in-One Automated Microfluidic System (PAMICON) with 3D-Printed Chip Using Novel Fluid Control Mechanism. Scientific Reports 11, 2021 mehr…BibTeXWWW
Konferenzbeiträge / Poster
Abel, Inga; Kowalsky, Clara: A fast Structural Synthesis Algorithm for Op-Amps based on Multi-Threading Strategies. International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), 2021 mehr…BibTeX
Arisawa, Kanta; Yamashita, Shigeru; Tseng, Tsun-Ming: MRR Usage Optimization for WRONoC Topology Generation and Communication Parallelism Depending on Bandwidth Requirements. Synthesis And System Integration of Mixed Information technologies (SASIMI), 2021 mehr…BibTeX
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Bellarmino, Nicolò; Cantoro, Riccardo; Huch, Martin; Kilian, Tobias; Martone, Raffaele; Schlichtmann, Ulf; Squillero, Giovanni: Exploiting Active Learning for Microcontroller Performance Prediction. IEEE European Test Symposium ETS, 2021 mehr…BibTeX
Bringmann, Oliver; Ecker, Wolfgang; Feldner, Ingo; Frischknecht, Adrian; Gerum, Christoph; Hämäläinen, Timo D.; Hanif, Muhammad Abdullah; Klaiber, Michael J.; Müller-Gritschneder, Daniel; Bernardo, Paul Palomero; Prebeck, Sebastian Siegfried; Shafique, Muhammad: Automated HW/SW co-design for edge AI: state, challenges and steps ahead. International Workshop on Hardware/Software Codesign, 2021 mehr…BibTeX
Chuang, Yu-Kai; Zhong, Yong; Cheng, Yi-Hao; Yu, Bo-Yi; Fang, Shao-Yun; Li, Bing; Schlichtmann, Ulf: RobustONoC: Fault-Tolerant Optical Networks-on-Chip with Path Backup and Signal Reflection. IEEE International Symposium on Quality Electronic Design (ISQED), 2021 mehr…BibTeX
Devarajegowda, Keerthikumara; Kaja, Endri; Prebeck, Sebastian Siegfried; Ecker, Wolfgang: ISA Modeling with Trace Notation for Context Free Property Generation. ACM/IEEE Design Automation Conference (DAC), 2021 mehr…BibTeX
Kaja, Endri; Gerlin, Nicolas; Vaddeboina, Mounika; Rivas, Luis; Prebeck, Sebastian Siegfried; Han, Zhao; Devarajegowda, Keerthikumara; Ecker, Wolfgang: Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021 mehr…BibTeX
Kilian, Tobias; Ahrens, Heiko; Tille, Daniel; Huch, Martin; Schlichtmann, Ulf: A Scalable Design Flow for Performance Monitors Using Functional Path Ring Oscillators. IEEE International Test Conference (ITC), 2021 mehr…BibTeX
Kilian, Tobias; Ahrens, Heiko; Tille, Daniel; Huch, Martin; Schlichtmann, Ulf: Automatic and Scalable Implementation Flow of Performance Monitors for Automotive MCU Using Functional Path Ring Oscillators. Automotive Reliability and Test in Europe (ARTe) Workshop, 2021 mehr…BibTeX
Kilian, Tobias; Ahrens, Heiko; Tille, Daniel; Huch, Martin; Schlichtmann, Ulf: Scalable Implementation of Functional Path Ring Oscillator for MCU Performance Screening. 33. GI/GMM/ITG Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2021 mehr…BibTeX
Koerber, Nikolai; Siebert, Andreas; Hauke, Sascha; Mueller-Gritschneder, Daniel: Tiny Generative Image Compression for Bandwidth-Constrained Sensor Applications. IEEE International Conference on Machine Learning and Applications, 2021 mehr…BibTeX
Last, Felix; Schlichtmann, Ulf: Feeding Hungry Models Less: Deep Transfer Learning for Embedded Memory PPA Models. MLCAD '21 - Proceedings of the 2021 ACM/IEEE Workshop on Machine Learning for CAD, 2021 mehr…BibTeX
Lo, Yun-Chen; Li, Bing; Park, Sooyong; Shin, Kwanwoo; Ho, Tsung-Yi: Interference-Free Design Methodology for Paper-Based Digital Microfluidic Biochips. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2021 mehr…BibTeX
Lopera, Daniela Sanchez; Servadei, Lorenzo; Kasi, Vishwa Priyanka; Prebeck, Sebastian Siegfried; Ecker, Wolfgang: RTL Delay Prediction Using Neural Networks. IEEE Nordic Circuits and Systems Conference (NorCAS), 2021 mehr…BibTeX
Lopera, Daniela Sanchez; Servadei, Lorenzo; Kiprit, Gamze Naz; Hazra, Souvik; Wille, Robert; Ecker, Wolfgang: A Survey of Graph Neural Networks for Electronic Design Automation. ACM/IEEE Workshop on Machine Learning for CAD, 2021 mehr…BibTeX
Neuner, Maximilian; Abel, Inga; Graeb, Helmut: Library-free Structure Recognition for Analog Circuits. Design, Automation and Test in Europe (DATE), 2021 mehr…BibTeX
Pircher, Sabine; Geier, Johannes; Zeh, Alexander; Mueller-Gritschneder, Daniel: Exploring the RISC-V Vector Extension for the Classic McEliece Post-Quantum Cryptosystem. 2021 22nd International Symposium on Quality Electronic Design (ISQED), IEEE, 2021 mehr…BibTeX
Qian, Yu; Fan, Zhenhao; Wang, Haoran; Li, Chao; Ni, Kai; Imani, Mohsen; Zhang, Li; Li, Bing; Schlichtmann, Ulf; Zhuo, Cheng; Yin, Xunzhao: Energy-Aware Designs of Ferroelectric Ternary Content Addressable Memory. Design, Automation and Test in Europe (DATE), 2021 mehr…BibTeX
Saeed, Ahsan; Mueller-Gritschneder, Daniel; Rehm, Falk; Hamann, Arne; Ziegenbein, Dirk; Schlichtmann, Ulf; Gerstlauer, Andreas: Learning based Memory Interference Prediction for Co-running Applications on Multi-Cores. MLCAD '21 - Proceedings of the 2021 ACM/IEEE Workshop on Machine Learning for CAD, 2021 mehr…BibTeX
Singla, Aayush; Lippmann, Bernhard; Graeb, Helmut: Recovery of 2D and 3D Layout Information through an Advanced Image Stitching Algorithm using Scanning Electron Microscope Images. International Conference on Pattern Recognition (ICPR), 2021 mehr…BibTeX
Tseng, Tsun-Ming; Lian, Meng; Li, Mengchu; Rinklin, Philipp; Grob, Leroy; Wolfrum, Bernhard; Schlichtmann, Ulf: Manufacturing Cycle-Time Optimization Using Gaussian Drying Model for Inkjet-Printed Electronics. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2021 mehr…BibTeX
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Xiao, Moyuan; Tseng, Tsun-Ming; Schlichtmann, Ulf: FAST: A Fast Automatic Sweeping Topology Customization Method for Application-Specific Wavelength-Routed Optical NoCs. Design, Automation and Test in Europe (DATE), 2021 mehr…BibTeX
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Zhang, Jingyao; Gu, Huaxi; Zhang, Li; Li, Bing; Schlichtmann, Ulf: Hardware-Software Codesign of Weight Reshaping and Systolic Array Multiplexing for Efficient CNNs. Design, Automation and Test in Europe (DATE), 2021 mehr…BibTeX
Zhang, Li; Li, Bing; Huang, Xing; Shen, Chen; Zhang, Shuhang; Burcea, Florin; Graeb, Helmut; Ho, Tsung-Yi; Li, Hai (Helen); Schlichtmann, Ulf: An Efficient Programming Framework for Memristor-based Neuromorphic Computing. Design, Automation and Test in Europe (DATE), 2021 mehr…BibTeX
Zhang, Li; Li, Bing; Zhu, Ying; Wang, Tianchen; Shi, Yiyu; Yin, Xunzhao; Zhuo, Cheng; Gu, Huaxi; Ho, Tsung-Yi; Schlichtmann, Ulf: Robustness of Neuromorphic Computing with RRAM-based Crossbars and Optical Neural Networks. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2021 mehr…BibTeX
Zhang, Shuhang; Li, Hai (Helen); Schlichtmann, Ulf: Connection-based Processing-In-Memory Engine Design Based on Resistive Crossbars. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2021 mehr…BibTeX
Zhang, Shuhang; Li, Hai (Helen); Schlichtmann, Ulf: Peripheral Circuitry Assisted Mapping Framework for Resistive Logic-In-Memory Computing. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2021 mehr…BibTeX
Zhang, Yushen; Tseng, Tsun-Ming; Schlichtmann, Ulf: Ein tragbares, automatisiertes All-in-One-Mikrofluidiksystem mit 3D-gedrucktem Chip und neuartigem Fluidsteuerungsmechanismus. VDE/VDI-GMM MikroSystemTechnik Kongress, 2021 mehr…BibTeX
Zheng, Zhidan; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf: ToPro: A Topology Projector and Waveguide Router for Wavelength-Routed Optical Networks-on-Chip. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2021 mehr…BibTeX
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Zheng, Zhidan; Li, Mengchu; Tseng, Tsun-Ming; Schlichtmann, Ulf: Light: A Scalable and Efficient Wavelength-Routed Optical Networks-On-Chip Topology. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2021 mehr…BibTeX
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Zuo, Fangda; Li, Mengchu; Tseng, Tsun-Ming; Ho, Tsung-Yi; Schlichtmann, Ulf: Relative-Scheduling-Based High-Level Synthesis for Flow-Based Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2021 mehr…BibTeX
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Shen, Duan: Contamination-Free Switch Design and Synthesis for Microfluidic Large-Scale Integration. Masterarbeit, 2021 mehr…BibTeX
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Wei, Eden Seet Jian: Development of an Online 3D-Microfluidics Designing Platform. Bachelorarbeit, 2021 mehr…BibTeX
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2020
Zeitschriftenartikel
Baehr, Johanna; Bernardini, Alessandro; Sigl, Georg; Schlichtmann, Ulf: Machine learning and structural characteristics for reverse engineering. Integration, the VLSI Journal 72, 2020, 1-12 mehr…BibTeX
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Burcea, Florin; Tannir, Dani; Graeb, Helmut: Fast SPICE-Compatible Simulation of Low-Power On-Chip PWM DC-DC Converters with Improved Ripple Accuracy. IEEE Transactions on Power Electronics (TPE), 2020 mehr…BibTeX
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Hu, Yong; Mettler, Marcel; Mueller-Gritschneder, Daniel; Wild, Thomas; Herkersdorf, Andreas; Schlichtmann, Ulf: Machine Learning Approaches for Efficient Design Space Exploration of Application-specific NoCs. ACM Transactions on Design Automation of Electronic Systems (TODAES) 25 (5), 2020 mehr…BibTeX
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Last, Felix; Haeberlein, Max; Schlichtmann, Ulf: Predicting Memory Compiler Performance Outputs using Feed-Forward Neural Networks. ACM Transactions on Design Automation of Electronic Systems (TODAES), 2020 mehr…BibTeX
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Lippmann, Bernhard; Unverricht, Niklas; Singla, Aayush; Ludwig, Matthias; Werner, Michael; Egger, Peter; Duebotzky, Anja; Graeb, Helmut; Gieser, Horst; Rasche, Martin; Kellermann, Oliver: Verification of Physical Designs using an Integrated Reverse Engineering Flow for Nanoscale Technologies. Integration, the VLSI Journal, 2020 mehr…BibTeX
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Liu, Chunfeng; Li, Bing; Bhattacharya, Bhargab B.; Chakrabarty, Krishnendu; Ho, Tsung-Yi; Schlichtmann, Ulf: Test Generation for Flow-Based Microfluidic Biochips with General Architectures. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (10), 2020 mehr…BibTeX
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Mettler, Marcel; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Runtime Monitoring of Inter- and Intra-Thread Requirements on Embedded MPSoCs. 2020 33rd International Conference on VLSI Design and 2020 19th International Conference on Embedded Systems (VLSID), 2020 mehr…BibTeX
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Mettler, Marcel; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: A Distributed Hardware Monitoring System for Runtime Verification on Multi-tile MPSoCs. Accepted for Publication in ACM Transactions on Architecture and Code Optimization, 2020 mehr…BibTeX
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Moradi, Yasamin; Ibrahim, Mohamed; Chakrabarty, Krishnendu; Schlichtmann, Ulf: An Efficient Fault-Tolerant Valve-Based Microfluidic Routing Fabric for Droplet Barcoding in Single-Cell Analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (2), 2020, 359 -- 372 mehr…BibTeX
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Neuner, Maximilian; Graeb, Helmut: Verification and Revision of the Power-Down Mode for Hierarchical Analog Circuits. INTEGRATION - the VLSI journal, 2020 mehr…BibTeX
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Servadei, Lorenzo; Mosca, Edoardo; Zennaro, Elena; Devarajegowda, Keerthikumara; Werner, Michael; Ecker, Wolfgang; Wille, Robert: Accurate Cost Estimation of Memory Systems Utilizing Machine Learning and Solutions from Computer Vision for Design Automation. IEEE Transactions on Computers 69 (6), 2020, 856--867 mehr…BibTeX
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Truppel, Alexandre; Tseng, Tsun-Ming; Bertozzi, Davide; Alves, José Carlos; Schlichtmann, Ulf: PSION+: Combining logical topology and physical layout optimization for Wavelength-Routed ONoCs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020 mehr…BibTeX
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Wang, Qin; Ji, Weiqing; Li, Zeyan; Cheong, Haena; Kwon, Oh‐Sun; Yao, Hailong; Ho, Tsung‐Yi; Shin, Kwanwoo; Li, Bing; Schlichtmann, Ulf; Cai, Yici: Integrated Control‐Fluidic CoDesign Methodology for Paper‐Based Digital Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (3), 2020 mehr…BibTeX
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Zhang, Li; Li, Bing; Li, Meng; Yu, Bei; Pan, David Z.; Brunner, Michaela; Sigl, Georg; Schlichtmann, Ulf: TimingCamouflage+: Netlist Security Enhancement with Unconventional Timing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (12), 2020, 4482-4495 mehr…BibTeX
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Zhu, Ying; Huang, Xing; Li, Bing; Ho, Tsung-Yi; Wang, Qin; Yao, Hailong; Wille, Robert; Schlichtmann, Ulf: MultiControl: Advanced Control Logic Synthesis for Flow-Based Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (10), 2020 mehr…BibTeX
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Konferenzbeiträge / Poster
Abel, Inga; Graeb, Helmut: Automatic Initial Sizing of Operational Amplifiers with Support of Weak, Moderate and Strong Inversion. ITG/GMM Symposium Design of Analog Circuits with EDA Methods (ANALOG), 2020 mehr…BibTeX
Abel, Inga; Graeb, Helmut: Structural Synthesis of Operational Amplifiers Based on Functional Block Modeling. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020 mehr…BibTeX
Bhatt, Vijay Deep; Ecker, Wolfgang; Esen, Volkan; Han, Zhao; Lopera, Daniela Sanchez; Patel, Rituj; Servadei, Lorenzo; Singla, Sahil; Wenzek, Sven; Yadav, Vijaydeep; Zennaro, Elena: SoC Design Automation with ML - It's Time for Research. ACM/IEEE Workshop on Machine Learning for CAD, 2020 mehr…BibTeX
Cantoro, Riccardo; Huch, Martin; Kilian, Tobias; Martone, Raffaele; Schlichtmann, Ulf; Squillero, Giovanni: Machine Learning based Performance Prediction of Microcontrollers using Speed Monitor. IEEE International Test Conference (ITC), 2020 mehr…BibTeX
Choudhary, Gautam; Pal, Sandeep; Kundu, Debraj; Bhattacharjee, Sukanta; Yamashita, Shigeru; Li, Bing; Schlichtmann, Ulf; Roy, Sudip: Transport-Free Module Binding for Sample Preparation using Microfluidic Fully Programmable Valve Arrays. Design, Automation and Test in Europe (DATE), 2020 mehr…BibTeX
Devarajegowda, Keerthikumara; Fadiheh, Mohammad Rahmani; Singh, Eshan; Barrett, Clark; Mitra, Subhasish; Ecker, Wolfgang; Stoffel, Dominik; Kunz, Wolfgang: Gap-free Processor Verification by S2QED and Property Generation. Design, Automation and Test in Europe (DATE), 2020 mehr…BibTeX
Devarajegowda, Keerthikumara; Hiltl, Valentin; Rabenalt, Thomas; Stoffel, Dominik; Kunz, Wolfgang; Ecker, Wolfgang: Formal Verification by The Book: Error Detection and Correction Codes. Design and Verification Conference and Exhibition (DVCon), 2020 mehr…BibTeX
Funk, Frederik; Bucksch, Thorsten; Mueller-Gritschneder, Daniel: ML Training on a Tiny Microcontroller for a Self-adaptive Neural Network-based DC Motor Speed Controller. ITEM Workshop: IoT, Edge, and Mobile for Embedded Machine Learning, 2020 mehr…BibTeX
Girardi, Alessandro; Graeb, Helmut: Modeling and Optimization of a Microprobe Detector for Area and Yield Improvement. Symposium on Integrated Circuit and Systems Design (SBCCI), 2020 mehr…BibTeX
Han, Zhao; Devarajegowda, Keerthikumara; Neumeier, Andreas; Ecker, Wolfgang: IP-Coding Style Variants in a Multi-layer Generator Framework. Design and Verification Conference and Exhibition (DVCon), 2020 mehr…BibTeX
Huang, Xing; Pan, Youlin; Zhang, Li; Li, Bing; Guo, Wenzhong; Ho, Tsung-Yi; Schlichtmann, Ulf: PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020 mehr…BibTeX
Last, Felix; Schlichtmann, Ulf: Partial Sharing Neural Networks for Multi-Target Regression on Power and Performance of Embedded Memories. MLCAD '20 - Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020 mehr…BibTeX
Li, Mengchu; Tseng, Tsun-Ming; Tala, Mahdi; Schlichtmann, Ulf: Maximizing the Communication Parallelism for Wavelength-Routed Optical Networks-on-Chips. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2020 mehr…BibTeX
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Lin, Ing-Chao; Schlichtmann, Ulf; Huang, Tsung-Wei; Lin, Mark Po-Hung: Overview of 2020 CAD Contest at ICCAD. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020 mehr…BibTeX
Neuner, Maximilian; Graeb, Helmut: Synergetic Algorithm for Power-Down Synthesis. European Conference on Circuit Theory and Design (ECCTD), 2020 mehr…BibTeX
Neuner, Maximilian; Graeb, Helmut: Hierarchical Analog Power-Down Synthesis. IEEE Int. Conf. Electronics, Circuits and Systems (ICECS), 2020 mehr…BibTeX
Rautakoura, Antti; Käyrä, Matti; Hämäläinen, Timo D.; Ecker, Wolfgang; Pekkarinen, Esko; Teuho, Mikko: Kamel: IP-XACT compatible intermediate meta-model for IP generation. EUROMICRO Conference on Digital System Design (DSD), 2020 mehr…BibTeX
Servadei, Lorenzo; Mosca, Edoardo; Devarajegowda, Keerthikumara; Werner, Michael; Ecker, Wolfgang; Wille, Robert: Cost Estimation for Configurable Model-Driven SoC Designs Using Machine Learning. Great Lakes Symposium on VLSI (GLS-VLSI), 2020 mehr…BibTeX
Servadei, Lorenzo; Zheng, Jiapeng; Arjona-Medina, Jose A.; Werner, Michael; Esen, Volkan; Hochreiter, Sepp; Ecker, Wolfgang; Wille, Robert: Cost Optimization at Early Stages of Design Using Deep Reinforcement Learning. ACM/IEEE Workshop on Machine Learning for CAD, 2020 mehr…BibTeX
Sharif, Uzair; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Investigating the Inherent Soft Error Resilience of Embedded Applications by Full-System Simulation. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2020 mehr…BibTeX
Truppel, Alexandre; Tseng, Tsun-Ming; Schlichtmann, Ulf: PSION 2: Optimizing Physical Layout of Wavelength-Routed ONoCs for Laser Power Reduction. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020 mehr…BibTeX
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Werner, Michael; Servadei, Lorenzo; Wille, Robert; Ecker, Wolfgang: Automatic compiler optimization on embedded software through k-means clustering. ACM/IEEE Workshop on Machine Learning for CAD, 2020 mehr…BibTeX
Werner, Michael; Zeraliu, Igli; Han, Zhao; Prebeck, Sebastian; Servadei, Lorenzo; Ecker, Wolfgang: Optimized HW/FW Generation from an Abstract Register Interface Model. EUROMICRO Conference on Digital System Design (DSD), 2020 mehr…BibTeX
Zhang, Li; Brunner, Michaela; Li, Bing; Sigl, Georg; Schlichtmann, Ulf: Timing Resilience for Efficient and Secure Circuits. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2020 mehr…BibTeX
Zhang, Li; Li, Bing; Zhu, Ying; Zhang, Shuhang; Wang, Tianchen; Shi, Yiyu; Ho, Tsung-Yi; Li, Hai (Helen); Schlichtmann, Ulf: Reliable and Robust RRAM-based Neuromorphic computing. ACM Great Lakes Symposium on VLSI (GLSVLSI), 2020 mehr…BibTeX
Zhang, Shuhang; Li, Bing; Li, Hai (Helen); Schlichtmann, Ulf: A Pulse-width Modulation Neuron with Continuous Activation for Processing-In-Memory Engines. Design, Automation and Test in Europe (DATE), 2020 mehr…BibTeX
Zhang, Shuhang; Zhang, Li; Li, Bing; Li, Hai (Helen); Schlichtmann, Ulf: Lifetime Enhancement for RRAM-Based Computing-In-Memory Engine Considering Aging and Thermal Effects. IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020 mehr…BibTeX
Zhu, Ying; Zhang, Li; Li, Bing; Yin, Xunzhao; Zhuo, Cheng; Gu, Huaixi; Ho, Tsung-Yi; Schlichtmann, Ulf: Countering Variations and Thermal Effects for Accurate Optical Neural Networks. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020 mehr…BibTeX
Zhu, Ying; Zhang, Li; Wan, Tianchen; Li, Bing; Shi, Yiyu; Ho, Tsung-Yi; Schlichtmann, Ulf: Statistical Training for Neuromorphic Computing using Memristor-based Crossbars Considering Process Variations and Noise. Design, Automation and Test in Europe (DATE), 2020 mehr…BibTeX
Sonstiges
Li, Qingyu: Synthesis of Large-Scale Wavelength-Routed Optical Networks-on-Chip Using Active Routers. Projektarbeit, 2020 mehr…BibTeX
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Lian, Meng: Developing Optimization Methods for Design Decomposition of Inkjet-Printed Electronics. Masterarbeit, 2020 mehr…BibTeX
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Burcea, Florin; Herrmann, Andreas; Li, Bing; Graeb, Helmut: MEMS-IC Robustness Optimization Considering Electrical and Mechanical Design and Process Parameters. ACM Transactions on Design Automation of Electronic Systems, 2019 mehr…BibTeX
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Ding, Ye; Burcea, Florin; Habal, Husni; Graeb, Helmut: PASTEL: Parasitic Matching-Driven Placement and Routing of Capacitor Arrays with Generalized Ratios in Charge-Redistribution SAR-ADCs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019 mehr…BibTeX
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Ibrahim, Mohamed; Chakrabarty, Krishnendu; Schlichtmann, Ulf: Synthesis of a Cyberphysical Hybrid Microfluidic Platform for Single-Cell Analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 38 (7), 2019, 1237 -- 1250 mehr…BibTeX
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Ibrahim, Mohamed; Sridhar, Aditya; Chakrabarty, Krishnendu; Schlichtmann, Ulf: Synthesis of Reconfigurable Flow-Based Biochips for Scalable Single-Cell Screening. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019 mehr…BibTeX
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Moradi, Yasamin; Ibrahim, Mohamed; Chakrabarty, Krishnendu; Schlichtmann, Ulf: An Efficient Fault-Tolerant Valve-Based Microfluidic Routing Fabric for Droplet Barcoding in Single-Cell Analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019 mehr…BibTeX
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Neuner, Maximilian; Zwerger, Michael; Graeb, Helmut: Automatischer Entwurf des Power-Down-Netzwerks für Analogschaltungen. VDE/VDI-GMM MikroSystemTechnik Kongress, 2019 mehr…BibTeX
Rangan, Jahnavi Kasturi; Aryan, Nasim Pour; Bargfrede, Jens; Wang, Lantao; Funke, Christian; Graeb, Helmut: Synthesis of DDRO Timing Monitors by Delay-Tracking and Static Timing Analysis. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019 mehr…BibTeX
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Servadei, Lorenzo; Zennaro, Elena; Fritz, Tobias; Devarajegowda, Keerthikumara; Ecker, Wolfgang; Wille, Robert: Using Machine Learning for predicting area and Firmware metrics of hardware designs from abstract specifications. Microprocessors and Microsystems, 2019 mehr…BibTeX
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Stahl, Rafael; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Driver Generation for IoT Nodes with Optimization of the Hardware/Software Interface. Embedded Systems Letters (ESL), 2019 mehr…BibTeX
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Zhang, Li; Li, Bing; Shi, Yiyu; Hu, Jiang; Schlichtmann, Ulf: EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration under Process Variations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019 mehr…BibTeX
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Zimmermann, Thomas; Mora, Mathias; Steinhorst, Sebastian; Mueller-Gritschneder, Daniel; Jossen, Andreas: Analysis of Dissipative Losses in Modular Reconfigurable Energy Storage Systems Using SystemC TLM and SystemC-AMS. ACM Transactions on Design Automation of Electronic Systems (TODAES), 2019 mehr…BibTeX
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Abel, Inga; Neuner, Maximilian; Graeb, Helmut: Constraint-Programmed Initial Sizing of Analog Operational Amplifiers. IEEE International Conference on Computer Design (ICCD), 2019 mehr…BibTeX
Baehr, Johanna; Bernardini, Alessandro; Sigl, Georg; Schlichtmann, Ulf: Machine Learning and Structural Characteristics for Reverse Engineering. Asia and South Pacific Design Automation Conference, 2019 mehr…BibTeX
Bernardini, Alessandro; Liu, Chunfeng; Li, Bing; Schlichtmann, Ulf: Fault Localization in Programmable Microfluidic Devices. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Burcea, Florin; Graeb, Helmut: Inversion-Coefficient-Aware Yield Optimization of Analog Circuits. IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2019 mehr…BibTeX
Burcea, Florin; Herrmann, Andreas; Li, Bing; Graeb, Helmut: MEMS-IC Yield Optimization with Electrical and Mechanical Process Parameters. CDNLive, 2019 mehr…BibTeX
Chakraborty, Samarjit; Anderson, James H.; Becker, Martin; Graeb, Helmut; Halder, Samiran; Metta, Ravindra; Thiele, Lothar; Tripakis, Stavros; Yeolekar, Anand: Cross-Layer Interactions in CPS for Performance and Certification. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Chen, Zhisheng; Huang, Xing; Guo, Wenzhong; Li, Bing; Ho, Tsung-Yi; Schlichtmann, Ulf: Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Devarajegowda, Keerthikumara; Ecker, Wolfgang; Kunz, Wolfgang: How to Keep 4-Eyes Principle in a Design and Property Generation Flow. Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV), 2019 mehr…BibTeX
Ecker, Wolfgang; Devarajegowda, Keerthikumara; Werner, Michael; Han, Zhao; Servadei, Lorenzo: Embedded Systems' Automation following OMG's Model Driven Architecture Vision. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Fritzmann, Tim; Sharif, Uzair; Mueller-Gritschneder, Daniel; Reinbrecht, Cezar; Schlichtmann, Ulf; Sepulveda, Johanna: Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Han, Zhao; Devarajegowda, Keerthikumara; Werner, Michael; Ecker, Wolfgang: Towards a Python-Based One Language Ecosystem for Embedded Systems Automation. IEEE Nordic Circuits and Systems Conference (NorCAS), 2019 mehr…BibTeX
Huang, Xing; Ho, Tsung-Yi; Guo, Wenzhong; Li, Bing; Schlichtmann, Ulf: MiniControl: Synthesis of Continuous-flow Microfluidics with Strictly Constrained Control Ports. ACM/IEEE Design Automation Conference (DAC), 2019 mehr…BibTeX
Kiesel, Sebastian; Kern, Thomas; Wicht, Bernhard; Graeb, Helmut: A 30ns 16Mb 2b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application. International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2019 mehr…BibTeX
Kleeberger, Petra R.; Rivera, Juana; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: SeRoHAL: Generation of Selectively Robust Hardware Abstraction Layers for Efficient Protection of Mixed-criticality Systems. Asia and South Pacific Design Automation Conference (ASP-DAC), 2019 mehr…BibTeX
Li, Mengchu; Tseng, Tsun-Ming; Ma, Yanlu; Ho, Tsung-Yi; Schlichtmann, Ulf: VOM: Flow-Path Validation and Control-Sequence Optimization for Multilayered Continuous-Flow Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019 mehr…BibTeX
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Lin, Yu-Huei; Ho, Tsung-Yi; Li, Bing; Schlichtmann, Ulf: Block-Flushing: A Block-based Washing Algorithm for Programmable Microfluidic Devices. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Lippmann, Bernhard; Werner, Michael; Unverricht, Niklas; Singla, Aayush; Egger, Peter; Dübotzky, Anja; Gieser, Horst; Rasche, Martin; Kellermann, Oliver; Graeb, Helmut: Integrated Flow for Reverse Engineering of Nanoscale Technologies. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2019 mehr…BibTeX
Listl, Alexandra; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: SRAM Design Exploration with Integrated Application-Aware Aging Analysis. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Listl, Alexandra; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: MAGIC: A Wear-leveling Circuitry to Mitigate Aging Effects in Sense Amplifiers of SRAMs. 2019 IEEE 17th International New Circuits and Systems Conference (NEWCAS), 2019 mehr…BibTeX
Liu, Xu; Zhou, Xing; Bernardini, Alessandro; Schlichtmann, Ulf: A Compact Model of Negative Bias Temperature Instability Suitable for Gate-Level Circuit Simulation. IEEE International Symposium on Quality Electronic Design (ISQED), 2019 mehr…BibTeX
Neuner, Maximilian; Graeb, Helmut: Power-Down Mode Verification for Hierarchical Analog Circuits. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2019 mehr…BibTeX
Payvar, Saman; Khan, Mir; Stahl, Rafael; Mueller-Gritschneder, Daniel; Boutellier, Jani: Neural Network-based Vehicle Image Classification for IoT Devices. International Workshop on Signal Processing Systems (SiPS), 2019 mehr…BibTeX
Payvar, Saman; Pekkarinen, Esko; Stahl, Rafael; Mueller-Gritschneder, Daniel; Hämäläinen, Timo D.: Instruction Extension of a RISC-V Processor Modeled with IP-XACT. IEEE Nordic Circuits and Systems Conference (NorCAS), 2019 mehr…BibTeX
Schlichtmann, Ulf; Das, Sabya; Lin, Ing-Chao; Lin, Mark Po-Hung: Overview of 2019 CAD Contest at ICCAD. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019 mehr…BibTeX
Servadei, Lorenzo; Han, Zhao; Werner, Michael; Ecker, Wolfgang; Devarajegowda, Keerthikumara: Formal Verification Methodology in an Industrial Setup. EUROMICRO Conference on Digital System Design (DSD), 2019 mehr…BibTeX
Servadei, Lorenzo; Zennaro, Elena; Devarajegowda, Keerthikumara; Manzinger, Martin; Ecker, Wolfgang; Wille, Robert: Accurate Cost Estimation of Memory Systems Inspired by Machine Learning for Computer Vision. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Singh, Eshan; Devarajegowda, Keerthikumara; Simon, Sebastian; Schnieder, Ralf; Ganesan, Karthik; Fadiheh, Mohammad; Stoffel, Dominik; Kunz, Wolfgang; Barrett, Clark; Ecker, Wolfgang; Mitra, Subhasish: Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Singla, Aayush; Lippmann, Bernhard; Graeb, Helmut: Verification of Physical Chip Layouts Using GDSII Design Data. International Verification and Security Workshop (IVSW), 2019 mehr…BibTeX
Stahl, Rafael; Zhao, Zhuoran; Mueller-Gritschneder, Daniel; Gerstlauer, Andreas; Schlichtmann, Ulf: Fully Distributed Deep Learning Inference on Resource-Constrained Edge Devices. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2019 mehr…BibTeX
Truppel, Alexandre; Tseng, Tsun-Ming; Bertozzi, Davide; Alves, José Carlos; Schlichtmann, Ulf: PSION: Combining logical topology and physical layout optimization for Wavelength-Routed ONoCs. ACM/SIGDA International Symposium on Physical Design (ISPD), 2019 mehr…BibTeX
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Tseng, Tsun-Ming; Li, Mengchu; Zhang, Yushen; Ho, Tsung-Yi; Schlichtmann, Ulf: Cloud Columba: Accessible Design Automation Platform for Production and Inspiration. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019 mehr…BibTeX
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Tseng, Tsun-Ming; Truppel, Alexandre; Li, Mengchu; Nikdast, Mahdi; Schlichtmann, Ulf: Wavelength-Routed Optical NoCs: Design and EDA — State of the Art and Future Directions. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019 mehr…BibTeX
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Yifang, Bao; Li, Bing; Ho, Tsung-Yi; Yamashita, Shigeru: Performance Improvements for Block-Flushing. Workshop on Synthesis And System Integration of Mixed Information Technologies, 2019 mehr…BibTeX
Zhang, Shuhang; Zhang, Li; Li, Bing; Li, Hai (Helen); Schlichtmann, Ulf: Aging-aware Lifetime Enhancement for Memristor-based Neuromorphic Computing. Design, Automation and Test in Europe (DATE), 2019 mehr…BibTeX
Sonstiges
Huang, Jing: Visualization of the Fluid Behavior on Microfluidic Large-Scale Integration Biochips. Bachelorarbeit, 2019 mehr…BibTeX
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Paul, Subarnaduti: Distributing Bit-Level Parallelism based on Different Communication Requirements on Wavelength-Routed Optical Networks-on-Chips. Projektarbeit, 2019 mehr…BibTeX
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Rafael Stahl, Daniel Mueller-Gritschneder: Technical Report: Driver Generation for IoT Nodes with Optimization of the Hardware/Software Interface. Technical University of Munich, 2019, mehr…BibTeX
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Zhang, Yushen: Prototyping a Portable 3D-Printed Microfluidic System Controlled Using a Single-Chip Computer. Masterarbeit, 2019 mehr…BibTeX
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Zuo, Fangda: High-Level Synthesis for Microfluidic Large Scale Integration Considering Hybrid-Scheduling. Masterarbeit, 2019 mehr…BibTeX
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2018
Zeitschriftenartikel
Bernardini, Alessandro; Liu, Chunfeng; Li, Bing; Schlichtmann, Ulf: Efficient spanning-tree-based test pattern generation for Programmable Microfluidic Devices. Microelectronics Journal, 2018 mehr…BibTeX
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Jassi, Munish; Hu, Yong; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Graph-Grammar-Based IP-Integration (GRIP) - An EDA Tool for Software-Defined SoCs. ACM Transactions on Design Automation of Electronic Systems (TODAES) 23 (3), 2018, 40:1--40:26 mehr…BibTeX
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Li, Bing; Hashimoto, Masanori; Schlichtmann, Ulf: From Process Variations to Reliability: A Survey of Timing of Digital Circuits in the Nanometer Era. IPSJ Transactions on System LSI Design Methodology 11, 2018, 2-15 mehr…BibTeX
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Martev, Dimo; Hampel, Sven; Schlichtmann, Ulf: Automated Phase Noise-Aware Design of RF Clock Distribution Circuits. IEEE Transactions on Very Large Scale Integration Systems (TVLSI) 26 (11), 2018, 2395 -- 2405 mehr…BibTeX
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Santoro, Francesco; Kuhn, Rüdiger; Gibson, Neil; Rasera, Nicola; Tost, Thomas; Graeb, Helmut; Wicht, Bernhard; Brederlow, Ralf: A Hysteretic Buck Converter With 92.1% Maximum Efficiency Designed for Ultra-Low Power and Fast Wake-Up SoC Applications. IEEE Journal of Solid-State Circuits SC 53 (6), 2018, 1856--1868 mehr…BibTeX
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Tseng, Tsun-Ming; Li, Mengchu; Freitas, Daniel Nestor; McAuley, Travis; Li, Bing; Ho, Tsung-Yi; Araci, Ismail Emre; Schlichtmann, Ulf: Columba 2.0: A Co-Layout Synthesis Tool for Continuous-Flow Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37 (8), 2018, 1588-1601 mehr…BibTeX
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Werner, Michael; Lippmann, Bernhard; Baehr, Johanna; Graeb, Helmut: Reverse Engineering of Cryptographic Cores by Structural Interpretation through Graph Analysis. , 2018 mehr…BibTeX
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Zhang, Li; Li, Bing; Liu, Jinglan; Shi, Yiyu; Schlichtmann, Ulf: Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37 (2), 2018, 392--405 mehr…BibTeX
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Zhang, Li; Li, Bing; Shi, Yiyu; Hu, Jiang; Schlichtmann, Ulf: EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration under Process Variations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018 mehr…BibTeX
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Konferenzbeiträge / Poster
Burcea, Florin; Herrmann, Andreas; Li, Bing; Graeb, Helmut: MEMS-IC Optimization Considering Design Parameters and Manufacturing Variation from both Mechanical and Electrical Side. IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2018 mehr…BibTeX
Devarajegowda, Keerthikumara; Ecker, Wolfgang: Meta-model Based Automation of Properties for Pre-Silicon Verification. IFIP International Conference on Very Large Scale Integration (VLSI), 2018 mehr…BibTeX
Devarajegowda, Keerthikumara; Schreiner, Johannes; Ecker, Wolfgang: Synthesis of Decoder Tables using Formal Verification Tools. Design and Verification Conference and Exhibition (DVCon), 2018 mehr…BibTeX
Ghosh, Saurav Kumar; Dey, Soumyajit; Goswami, Dip; Mueller-Gritschneder, Daniel; Chakraborty, Samarjit: Design and Validation of Fault-tolerant Embedded Controllers. Design, Automation and Test in Europe (DATE), 2018 mehr…BibTeX
Herrmann, Andreas; Weiner, Michael; Pehl, Michael; Graeb, Helmut: Bringing Analog Design Tools to Security: Modeling and Optimization of a Low Area Probing Detector. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2018 mehr…BibTeX
Hu, Yong; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Wavefront-MCTS: Multi-objective Design Space Exploration of NoC Architectures based on Monte Carlo Tree Search. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018 mehr…BibTeX
Jiao, Fengxian; Dong, Sheqin; Yu, Bei; Li, Bing; Schlichtmann, Ulf: Thermal-Aware Placement and Routing for 3D Optical Networks-on-Chips. IEEE International Symposium on Circuits and Systems (ISCAS), 2018 mehr…BibTeX
Li, Mengchu; Tseng, Tsun-Ming; Bertozzi, Davide; Tala, Mahdi; Schlichtmann, Ulf: CustomTopo: A Topology Generation Method for Application-Specific Wavelength-Routed Optical NoCs. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018 mehr…BibTeX
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Listl, Alexandra; Mueller-Gritschneder, Daniel; Kluge, Fabian; Schlichtmann, Ulf: Emulation of an ASIC Power, Temperature and Aging Monitor System for FPGA Prototyping. IEEE International On-Line Testing Symposium (IOLTS), 2018 mehr…BibTeX
Liu, Chunfeng; Li, Bing; Bhattacharya, Bhargab B.; Chakrabarty, Krishnendu; Ho, Tsung-Yi; Schlichtmann, Ulf: Test Generation for Microfluidic Fully Programmable Valve Arrays (FPVAs) with Heuristic Acceleration. International Conference on IC Design and Technology (Invited Paper), 2018 mehr…BibTeX
Maier, Petra R.; Sharif, Uzair; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Efficient Fault Injection for Embedded Systems: As Fast as Possible but as Accurate as Necessary. IEEE International On-Line Testing Symposium (IOLTS), 2018 mehr…BibTeX
Moradi, Yasamin; Chakrabarty, Krishnendu; Schlichtmann, Ulf: An Efficient Fault-Tolerant Valve-Based Microfluidic Routing Fabric for Single-Cell Analysis. IEEE European Test Symposium, 2018 mehr…BibTeX
Moradi, Yasamin; Ibrahim, Mohamed; Chakrabarty, Krishnendu; Schlichtmann, Ulf: Fault-tolerant valve-based microfluidic routing fabric for droplet barcoding in single-cell analysis. Design, Automation and Test in Europe (DATE), 2018 mehr…BibTeX
Mueller-Gritschneder, Daniel; Dittrich, Martin; Weinzierl, Josef; Cheng, Eric; Mitra, Subhasish; Schlichtmann, Ulf: {ETISS-ML}: A Multi-Level Instruction Set Simulator with {RTL}-level Fault Injection Support for the Evaluation of Cross-Layer Resiliency Techniques. Design, Automation and Test in Europe (DATE), 2018 mehr…BibTeX
Mueller-Gritschneder, Daniel; Sharif, Uzair; Schlichtmann, Ulf: Performance and Accuracy in Soft-Error Resilience Evaluation using the Multi-Level Processor Simulator ETISS-ML. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018 mehr…BibTeX
Neuner, Maximilian; Zwerger, Michael; Graeb, Helmut: Analog Power-Down-Synthesis: Integration into an IC Design Flow. Frontiers in Analog Circuit Synthesis and Verification (FAC), 2018 mehr…BibTeX
Rangan, Jahnavi Kasturi; Aryan, Nasim Pour; Wang, Lantao; Bargfrede, Jens; Funke, Christian; Graeb, Helmut: Design-dependent Monitors Based on Delay Sensitivity Tracking. IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2018 mehr…BibTeX
Servadei, Lorenzo; Zennaro, Elena; Devarajegowda, Keerthikumara; Ecker, Wolfgang; Wille, Robert: Quality Assessment of Generated Hardware Designs Using Statistical Analysis and Machine Learning. International Conference on Tools with Artificial Intelligence (ICTAI), 2018 mehr…BibTeX
Stahl, Rafael; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Automated Redirection of Hardware Accesses for Host-Compiled Software Simulation. Forum on Specification and Design Languages (FDL), 2018 mehr…BibTeX
Tille, Daniel; Gottinger, Benedikt; Pfannkuchen, Ulrike; Graeb, Helmut; Schlichtmann, Ulf: On Enabling Diagnosis for 1-Pin Test Fails in an Industrial Flow. Asia and South Pacific Design Automation Conference (ASP-DAC), 2018 mehr…BibTeX
Wille, Robert; Li, Bing; Drechsler, Rolf; Schlichtmann, Ulf: Automatic Design of Microfluidic Devices - An Overview of Platforms and Corresponding Design Tasks. Forum on Specification and Design Languages (FDL), 2018 mehr…BibTeX
Wu, Liang; Hussain, Mohammad Khizer; Abughannam, Saed; Müller, Wolfgang; Scheytt, Christoph; Ecker, Wolfgang: Analog Fault Simulation Automation at Schematic Level with Random Sampling Techniques. International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS), 2018 mehr…BibTeX
Zennaro, Elena; Servadei, Lorenzo; Devarajegowda, Keerthikumara; Ecker, Wolfgang: A Machine Learning Approach for Area Prediction of Hardware Designs from Abstract Specifications. EUROMICRO Conference on Digital System Design (DSD), 2018 mehr…BibTeX
Zhang, Li; Li, Bing; Hashimoto, Masanori; Schlichtmann, Ulf: VirtualSync: Timing Optimization by Synchronizing Logic Waves with Sequential and Combinational Components as Delay Units. ACM/IEEE Design Automation Conference (DAC), 2018 mehr…BibTeX
Zhang, Li; Li, Bing; Schlichtmann, Ulf: Timing with Virtual Signal Synchronization for Circuit Performance and Netlist Security. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2018 mehr…BibTeX
Zhang, Li; Li, Bing; Yu, Bei; Pan, David Z.; Schlichtmann, Ulf: TimingCamouflage: Improving Circuit Security against Counterfeiting by Unconventional Timing. Design, Automation and Test in Europe (DATE), 2018 mehr…BibTeX
Zhu, Ying; Li, Bing; Ho, Tsung-Yi; Wang, Qin; Yao, Hailong; Wille, Robert; Schlichtmann, Ulf: Multi-Channel and Fault-Tolerant Control Multiplexing for Flow-Based Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018 mehr…BibTeX
Sonstiges
Bejm, Jaroslaw Konrad: Area routing algorithm using flat spiral pattern delay lines to counter the speed-up effect present in routing using dense meander segment delay lines. Masterarbeit, 2018 mehr…BibTeX
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Tseng, Tsun-Ming; Li, Bing; Yeh, Ching-Feng; Jhan, Hsiang-Chieh; Tsai, Zuo-Min; Lin, Mark Po-Hung; Schlichtmann, Ulf: An Efficient Two-Phase ILP-Based Algorithm for Precise CMOS RFIC Layout Generation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 36 (8), 2017, 1313-1326 mehr…BibTeX
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Chou, Pang-Yen; Chen, Nai-Chen; Lin, Mark Po-Hung; Graeb, Helmut: Matched-Routing Common-Centroid 3-D MOM Capacitors for Low-Power Data Converters. IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2017 mehr…BibTeX
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Glocker, Elisabeth; Chen, Qingqing; Schlichtmann, Ulf; Landsiedel, Doris Schmitt: Emulation of an {ASIC} Power and Temperature Monitoring System (eTPMon) for {FPGA} Prototyping. Microprocessors and Microsystems 50, 2017, 90--101 mehr…BibTeX
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Hu, Yong; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: A Model-based Framework For Networks-on-Chip Design Space Exploration. 2nd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS), 2017 mehr…BibTeX
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Maier, Petra R.; Kleeberger, Veit B.; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Fault Injection for Test-Driven Development of Robust SoC Firmware (PDF). ACM Transactions on Embedded Computing Systems (TECS) 17, 2017 mehr…BibTeX
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Neuner, Maximilian; Zwerger, Michael; Graeb, Helmut: Power-Down-Synthese für analoge Schaltungen. ZuE 2017; 9. ITG/GMM/GI-Fachtagung Zuverlässigkeit und Entwurf, 2017 mehr…BibTeX
Wang, Qin; Xu, Yue; Zuo, Shiliang; Yao, Hailong; Ho, Tsung-Yi; Li, Bing; Schlichtmann, Ulf; Cai, Yici: Pressure-Aware Control Layer Optimization for Flow-Based Microfluidic Biochips. IEEE Transactions on Biomedical Circuits and Systems (TBioCAS) 11 (6), 2017, 1488-1499 mehr…BibTeX
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Zwerger, Michael; Neuner, Maximilian; Graeb, Helmut: Analog Power-Down Synthesis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017 mehr…BibTeX
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Burcea, Florin; Herrmann, Andreas; Graeb, Helmut: Towards MEMS-IC Robustness Optimization. Frontiers in Analog Circuit (FAC) Synthesis and Verification, 2017 mehr…BibTeX
Burcea, Florin; Herrmann, Andreas; Gupta, Aditya; Graeb, Helmut: A New Robustness Optimization Methodology for MEMS-IC Systems. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017 mehr…BibTeX
Chen, Nai-Chen; Chou, Pang-Yen; Graeb, Helmut; Lin, Mark Po-Hung: High-Density MOM Capacitor Array with Novel Mortise-Tenon Structure for Low-Power SAR ADCs. Design, Automation and Test in Europe (DATE), 2017 mehr…BibTeX
Herrmann, Andreas; Hielscher, Christof; Mueller, Alexander; Hoelzer, Gisbert; Graeb, Helmut: Realistic Worst-Case for MEMS. Frontiers in Analog Circuit (FAC) Synthesis and Verification, 2017 mehr…BibTeX
Herrmann, Andreas; Hielscher, Christof; Mueller, Alexander; Hoelzer, Gisbert; Graeb, Helmut: Realistic Worst-Case Parameter Sets for MEMS Technologies. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017 mehr…BibTeX
Ibrahim, Mohamed; Chakrabarty, Krishnendu; Schlichtmann, Ulf: CoSyn: Efficient single-cell analysis using a hybrid microfluidic platform. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 mehr…BibTeX
Ibrahim, Mohamed; Sridhar, Aditya; Chakrabarty, Krishnendu; Schlichtmann, Ulf: Sortex: Efficient Timing-Driven Synthesis of Reconfigurable Flow-Based Biochips for Scalable Single-Cell Screening. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2017 mehr…BibTeX
Karapetyan, S.; Schlichtmann, U.: 20nm FinFET-based SRAM cell: Impact of variability and design choices on performance characteristics. Int. Conf. Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017 mehr…BibTeX
Li, Bing; Schlichtmann, Ulf: Reliability-aware Synthesis and Fault Test of Fully Programmable Valve Arrays (FPVAs). IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, (Invited Paper), 2017(Invited Paper)mehr…BibTeX
Liu, Chunfeng; Li, Bing; Bhattacharya, Bhargab B.; Chakrabarty, Krishnendu; Ho, Tsung-Yi; Schlichtmann, Ulf: Testing Microfluidic Fully Programmable Valve Arrays (FPVAs) (pdf). Design, Automation and Test in Europe (DATE), 2017 mehr…BibTeX
Liu, Chunfeng; Li, Bing; Yao, Hailong; Pop, Paul; Ho, Tsung-Yi; Schlichtmann, Ulf: Transport or Store? Synthesizing Flow-based Microfluidic Biochips using Distributed Channel Storage. ACM/IEEE Design Automation Conference (DAC), 2017 mehr…BibTeX
Liu, Jinglan; Ding, Yukun; Yang, Jianlei; Schlichtmann, Ulf; Shi, Yiyu: Generative Adversarial Network Based Scalable On-chip Noise Sensor Placement. IEEE International System on Chip Conference (SOCC), 2017 mehr…BibTeX
Martev, Dimo; Hampel, Sven; Schlichtmann, Ulf: Methodology for automated phase noise minimization in RF circuit interconnect trees. IEEE International Symposium on Circuits and Systems (ISCAS), 2017 mehr…BibTeX
Martev, Dimo; Hampel, Sven; Schlichtmann, Ulf: A Method for Phase Noise Analysis of RF Circuits. Great Lakes Symposium on VLSI (GLVLSI), 2017 mehr…BibTeX
Mueller-Gritschneder, Daniel; Dittrich, Martin; Greim, Marc; Devarajegowda, Keerthikumara; Ecker, Wolfgang; Schlichtmann, Ulf: The Extendable Translating Instruction Set Simulator (ETISS) interlinked with an MDA Framework for fast RISC Prototyping. IEEE International Symposium on Rapid System Prototyping (RSP), 2017 mehr…BibTeX
Schlichtmann, Ulf: Frontiers of timing. ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP), 2017 mehr…BibTeX
Wang, Qin; Zuo, Shiliang; Yao, Hailong; Ho, Tsung-Yi; Li, Bing; Schlichtmann, Ulf; Cai, Yici: Hamming-Distance-Based Valve-Switching Optimization for Control Multiplexing in Flow-Based Microfluidic Biochip (pdf). IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2017 mehr…BibTeX
Yigit, Baris; Zhang, Li; Li, Bing; Shi, Yiyu; Schlichtmann, Ulf: Application of Machine Learning Methods in Post-Silicon Yield Improvement. IEEE International System on Chip Conference (SOCC), 2017 mehr…BibTeX
Shuhang Zhang: Evaluation of Statistical Prediction for Non-Gaussian Distributions. Projektarbeit, 2017 mehr…BibTeX
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Zhang, Yushen: Integration of Columba — Design Automation for Microfluidics — as a Web Service with Web User Interface. Bachelorarbeit, 2017 mehr…BibTeX
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Glocker, Elisabeth: Thermisches Verhalten und emuliertes online Temperatur-Monitorsystem für das FPGA-Prototyping von Multiprozessor-Architekturen. Dissertation, 2017 mehr…BibTeX
Sievert, Sebastian: Development of Analytical Behavioral Models for Digitally Controlled Edge Interpolator (DCEI) based Digital-to-Time Converter (DTC) Circuits. Dissertation, 2017 mehr…BibTeX
Zwerger, Michael: Verification and Synthesis of Analog Power-Down Circuits. Dissertation, 2017 mehr…BibTeX
Habal, Husni; Graeb, Helmut: A Step-Accurate Model for the Trapping and Release of Charge Carriers Suitable for the Transient Simulation of Analog Circuits. Journal of Microelectronics Reliability, 2016 mehr…BibTeX
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Karapetyan, Shushanik; Kleeberger, Veit B.; Schlichtmann, Ulf: FinFET Based Product Performance: Modeling and Evaluation of Standard Cells in FinFET Technologies. Microelectronics Reliability 61, 2016, 30-34 mehr…BibTeX
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Lange, André; Sohrmann, Christoph; Jancke, Roland; Haase, Joachim; Cheng, Binjie; Asenov, Asen; Schlichtmann, Ulf: Multivariate Modeling of Variability Supporting Non-Gaussian and Correlated Parameters. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 35 (2), 2016 mehr…BibTeX
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Lin, Mark Po-Hung; Chang, Po-Hsun; Lee, Shuenn-Yuh; Graeb, Helmut E.: DeMixGen: Deterministic Mixed-signal Layout Generation with Separated Analog and Digital Signal Paths. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016 mehr…BibTeX
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Pagani, Santiago; Bauer, Lars; Chen, Qingqing; Glocker, Elisabeth; Hannig, Frank; Herkersdorf, Andreas; Khdr, Heba; Pathania, Anuj; Schlichtmann, Ulf; Schmitt-Landsiedel, Doris; Sagi, Mark; Sousa, Ericles; Wagner, Philipp; Wenzel, Volker; Wild, Thomas; Henkel, Jörg: Dark silicon management: an integrated and coordinated cross-layer approach. it - Information Technology 58 (6), 2016 mehr…BibTeX
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Schlichtmann, Ulf: The next frontier in IC design: Determining (and optimizing) robustness and resilience of integrated circuits and systems. 2016 China Semiconductor Technology International Conference (CSTIC), 2016, 1-4 mehr…BibTeX
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Tabacaru, Bogdan Andrei; Chaari, Moomen; Ecker, Wolfgang; Kruse, Thomas; Novello, Cristiano: {Optimization of Transient-Fault Injection Through Analysis of Simulation Traces}. edaWorkshop, 2016, 1--6 mehr…BibTeX
Tabacaru, Bogdan Andrei; Chaari, Moomen; Ecker, Wolfgang; Kruse, Thomas; Novello, Cristiano: {Gate-Level-Accurate Fault-Effect Analysis at Virtual-Prototype Speed}. ERCIM/EWICS/ARTEMIS Workshop on ``Dependable Embedded and Cyber-physical Systems and Systems-of-Systems'' (DECSoS'16), 2016, 1--13 mehr…BibTeX
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Tabacaru, Bogdan Andrei; Chaari, Moomen; Ecker, Wolfgang; Kruse, Thomas; Novello, Cristiano: {Efficient Checkpointing-Based Safety-Verification Flow Using Compiled-Code Simulation}. Digital System Design (DSD), 2016 Euromicro Conference on, 2016, 1--8 mehr…BibTeX
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Tabacaru, Bogdan Andrei; Chaari, Moomen; Ecker, Wolfgang; Kruse, Thomas; Novello, Cristiano: {Fault-Effect Analysis on Multiple Abstraction Levels in Hardware Modeling}. DVCon USA, 2016, 1--12 mehr…BibTeX
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Tabacaru, Bogdan Andrei; Chaari, Moomen; Ecker, Wolfgang; Kruse, Thomas; Novello, Cristiano: {Fault-Effect Analysis on System-Level Hardware Modeling using Virtual Prototypes}. Forum on Specification and Design Languages (FDL), 2016, 1--7 mehr…BibTeX
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Tabacaru, Bogdan Andrei; Chaari, Moomen; Ecker, Wolfgang; Kruse, Thomas; Novello, Cristiano: {Speeding up Safety Verification by Fault Abstraction and Simulation to Transaction Level}. IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2016, 1--6 mehr…BibTeX
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Tseng, Tsun-Ming; Li, Bing; Li, Mengchu; Ho, Tsung-Yi; Schlichtmann, Ulf: Reliability-aware Synthesis with Dynamic Device Mapping and Fluid Routing for Flow-based Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 35 (12), 2016, 1981-1994 mehr…BibTeX
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Wu, Jie; Schlichtmann, Ulf; Shi, Yiyu: On the measurement of power grid robustness under load uncertainties. 2016 IEEE International Conference on Smart Grid Communications (SmartGridComm), 2016, 218-223 mehr…BibTeX
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Konferenzbeiträge / Poster
Bernardini, Alessandro; Ecker, Wolfgang; Schlichtmann, Ulf: Efficient handling of the fault space in functional safety analysis utilizing formal methods. 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2016 mehr…BibTeX
Bernardini, Alessandro; Ecker, Wolfgang; Schlichtmann, Ulf: Where Formal Verification Can Help in Functional Safety Analysis. Proceedings of the 35th International Conference on Computer-Aided Design (ICCAD), 2016 mehr…BibTeX
Beuningen, Anja von; Schlichtmann, Ulf: PLATON: A Force-Directed Placement Algorithm for 3D Optical Networks-on-Chip. ACM/SIGDA International Symposium on Physical Design (ISPD), 2016 mehr…BibTeX
Burcea, Florin; Habal, Husni; Graeb, Helmut: Eine Methode zur Platzierung der Kapazitäten in differenziellen Ladungsumverteilungs-Wandlern durch Analyse von Nichtlinearitäten. edaWorkshop, 2016 mehr…BibTeX
Burcea, Florin; Habal, Husni; Graeb, Helmut: A Novel Analytical Model for the Static Behavior of a Monotonic-Switching Charge-Scaling ADC. Ph.D. Research in Microelectronics and Electronics (PRIME), 2016 mehr…BibTeX
Chaari, Moomen; Ecker, Wolfgang; Kruse, Thomas; Novello, Cristiano; Tabacaru, Bogdan Andrei: Transformation of Failure Propagation Models into Fault Trees for Safety Evaluation Purposes. Dependable Systems and Networks Workshop, 2016 46th Annual IEEE/IFIP International Conference on, 2016 mehr…BibTeX
Chaari, Moomen; Ecker, Wolfgang; Tabacaru, Bogdan Andrei: {Towards Cross-Domain and Multi-Level Dependability Analysis Through Metamodeling and Code Generation}. , 2016 mehr…BibTeX
Chaari, Moomen; Ecker, Wolfgang; Tabacaru, Bogdan Andrei; Novello, Cristiano; Kruse, Thomas: {Linking Model-Based Safety Analysis to Fault Injection and Simulation in Virtual Prototypes}. , 2016 mehr…BibTeX
Chou, Pang-Yen; Lin, Mark Po-Hung; Graeb, Helmut: An integrated placement and routing for ratioed capacitor array based on ILP formulation. VLSI Design, Automation and Test (VLSI-DAT), 2016 mehr…BibTeX
Ecker, Wolfgang; Schreiner, Johannes: Introducing Model-of-Things (MoT) and Model-of-Design (MoD) for simpler and more efficient hardware generators. 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2016 mehr…BibTeX
Jassi, Munish; Hu, Yong; Lyu, Jian; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: GRIP: Graph-Rewriting-Based IP-Integration - An EDA Tool for Software Defined SoC Design. Design, Automation and Test in Europe (DATE) University Booth, 2016 mehr…BibTeX
Jassi, Munish; Sharif, Uzair; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Hardware-Accelerated Software Libraries Drivers Generation for IP-Centric SoC Designs. Great Lakes Symposium on VLSI (GLS-VLSI), 2016 mehr…BibTeX
Li, Mengchu; Tseng, Tsun-Ming; Li, Bing; Ho, Tsung-Yi; Schlichtmann, Ulf: Sieve-valve-aware Synthesis of Flow-based Microfluidic Biochips Considering Specific Biological Execution Limitations. Design, Automation and Test in Europe (DATE), 2016 mehr…BibTeX
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Maier, Petra R.; Kleeberger, Veit B.; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Fault Injection at Host-Compiled Level with Static Fault Set Reduction for SoC Firmware Robustness Testing. International conference on Hardware/Software codesign and system synthesis (CODES+ISSS), 2016 mehr…BibTeX
Maier, Petra R.; Kleeberger, Veit B.; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Fehlerinjektion auf Unit-Ebene zur Robustheitsverifikation eingebetteter Software. edaWorkshop, 2016 mehr…BibTeX
Maier, Petra R.; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf; Kleeberger, Veit B.: Embedded Software Reliability Testing by Unit-Level Fault Injection. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2016 mehr…BibTeX
Martev, Dimo; Hampel, Sven; Schlichtmann, Ulf: Fully synthesized time-to-digital converter for cellular transceivers. Second International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP), 2016 mehr…BibTeX
Martev, Dimo; Hampel, Sven; Schlichtmann, Ulf: Synthesis-based methodology for high-speed multi-modulus divider. 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD, 2016 mehr…BibTeX
Mueller-Gritschneder, Daniel; Greim, Marc; Schlichtmann, Ulf: Safety Evaluation based on Virtual Prototypes: Fault Injection with Multi-level Processor Models. International Symposium on Integrated Circuits (ISIC), 2016 mehr…BibTeX
Schlichtmann, Ulf; Hashimoto, Masanori; Jiang, Iris Hui-Ru; Li, Bing: Reliability, Adaptability and Flexibility in Timing: Buy a Life Insurance for Your Circuits. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2016 mehr…BibTeX
Schreiner, Johannes; Findenig, Rainer; Ecker, Wolfgang: Design centric modeling of digital hardware. High Level Design Validation and Test Workshop (HLDVT), 2016 IEEE International, 2016 mehr…BibTeX
Tille, Daniel; Stanley, Daniel Thangaraj; Pfannkuchen, Ulrike; Graeb, Helmut; Schlichtmann, Ulf: On Improving Test Point Insertion using Fault Classification Results. ITG/GMM/GI Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, 2016 mehr…BibTeX
Wang, Qin; Li, Zeyan; Cheong, Haena; Kwon, Oh-Sun; Yao, Hailong; Ho, Tsung-Yi; Shin, Kwanwoo; Li, Bing; Schlichtmann, Ulf; Cai, Yici: Control-Fluidic CoDesign for Paper-Based Digital Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2016 mehr…BibTeX
Wille, Robert; Li, Bing; Schlichtmann, Ulf; Drechsler, Rolf: From Biochips to Quantum Circuits: Computer-Aided Design for Emerging Technologies. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2016 mehr…BibTeX
Zhang, Li; Li, Bing; Schlichtmann, Ulf: Sampling-based Buffer Insertion for Post-Silicon Yield Improvement under Process Variability. Design, Automation and Test in Europe (DATE), 2016 mehr…BibTeX
Zhang, Li; Li, Bing; Schlichtmann, Ulf: EffiTest: Efficient Delay Test and Statistical Prediction for Configuring Post-silicon Tunable Buffers (Best paper award nomination). ACM/IEEE Design Automation Conference (DAC), 2016 mehr…BibTeX
Zhang, Li; Li, Bing; Schlichtmann, Ulf: PieceTimer: A Holistic Timing Analysis Framework Considering Setup/Hold Time Interdependency Using A Piecewise Model. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2016 mehr…BibTeX
Zhang, Li; Listl, Alexandra; Li, Bing; Schlichtmann, Ulf: Effizienter Verzögerungstest zur Optimierung der Taktfrequenz einer Schaltung durch nach der Fertigung konfigurierbare Puffer. edaWorkshop, 2016 mehr…BibTeX
Zwerger, Michael; Shrivastava, Gaurav; Graeb, Helmut: Power-Down Synthesis for Analog Circuits including Switch Sizing. Symbolic Methods and Applications in Circuit Design (SMACD), 2016 mehr…BibTeX
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Armin Sadighi: Timing with flexible flip flop model using piecewise linearization. Masterarbeit, 2016 mehr…BibTeX
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Cheng, Liaoyuan: Control Channel Routing for Matrix-Based Continuous-Flow Microfluidic Biochips. Bachelorarbeit, 2016 mehr…BibTeX
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Dhiraj Pathania: Statistical Delay Prediction for Configuring PST Buffers using Correlation-Based Clustering. Projektarbeit, 2016 mehr…BibTeX
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Petra R. Maier; Veit B. Kleeberger; Daniel Mueller-Gritschneder; Ulf Schlichtmann: Fault Injection at Host-Compiled Level with Static Fault Set Reduction for Automotive Firmware Robustness Verification. Technische Universität München, (TUM-LEA-16-1), 2016, mehr…BibTeX
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Yasamin Moradi: Introducing a new approach for mixer assignment, routing, and storage of fluid in Microfluidic Biochips. Masterarbeit, 2016 mehr…BibTeX
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2015
Zeitschriftenartikel
Barke, Martin; Schlichtmann, Ulf: A Cross-Layer Approach to Measure the Robustness of Integrated Circuits. ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special Issue on Cross-Layer System Design and Regular Papers 12 (3), 2015 mehr…BibTeX
Beuningen, Anja von; Ramini, Luca; Bertozzi, Davide; Schlichtmann, Ulf: PROTON+: A Placement and Routing Tool for 3D Optical Networks-on-Chip with a Single Optical Layer. ACM Journal on Emerging Technologies in Computing Systems (JETC) 12 (4), 2015, 44:1--44:28 mehr…BibTeX
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Burcea, Florin; Habal, Husni; Graeb, Helmut: A New Chessboard Placement and Sizing Method for Capacitors in a Charge-Scaling DAC by Worst-Case Analysis of Nonlinearity. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on PP (99), 2015, 1-1 mehr…BibTeX
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Bürmen, Arpad; Habal, Husni: Computing Worst-Case Performance and Yield of Analog Integrated Circuits by Means of Mesh Adaptive Direct Search. Informacije MIDEM, Journal of Microelectronics, Electronic Components and Materials 45 (2), 2015, 160-170 mehr…BibTeX
Glaß, Michael; Aliee, Hananeh; Chen, Liang; Ebrahimi, Mojtaba; Khosravi, Faramarz; Kleeberger, Veit B.; Listl, Alexandra; Müller-Gritschneder, Daniel; Oboril, Fabian; Schlichtmann, Ulf; Tahoori, Mehdi B.; Teich, Jürgen; Wehn, Norbert; Weis, Christian: Application-aware cross-layer reliability analysis and optimization. it – Information Technology 2015 57, 2015, 159–169 mehr…BibTeX
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Li, Bing; Schlichtmann, Ulf: Statistical Timing Analysis and Criticality Computation for Circuits With Post-Silicon Clock Tuning Elements. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015 mehr…BibTeX
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Pehl, Christian Michael; Hiller, Matthias; Graeb, Helmut: Efficient Evaluation of Physical Unclonable Functions Using Entropy Measures. Journal of Circuits, Systems, and Computers, 2015 mehr…BibTeX
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Tseng, Tsun-Ming; Li, Bing; Ho, Tsung-Yi; Schlichtmann, Ulf: ILP-based Alleviation of Dense Meander Segments with Prioritized Shifting and Progressive Fixing in PCB Routing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015 mehr…BibTeX
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Tseng, Tsun-Ming; Li, Bing; Schlichtmann, Ulf; Ho, Tsung-Yi: Storage and Caching: Synthesis of Flow-based Microfluidic Biochips. IEEE Design and Test, 2015 mehr…BibTeX
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Konferenzbeiträge / Poster
Beuningen, Anja von; Schlichtmann, Ulf: A Force-Directed Placement Algorithm for 3D Optical Networks-on-Chip. International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS), 2015 mehr…BibTeX
Bringmann, Oliver; Ecker, Wolfgang; Gerstlauer, Andreas; Goyal, Ajay; Mueller-Gritschneder, Daniel; Sasidharan, Prasanth; Singh, Simranjit: The Next Generation of Virtual Prototyping: Ultra-fast Yet Accurate Simulation of HW/SW Systems. Design, Automation and Test in Europe (DATE), 2015 mehr…BibTeX
Chen, Qingqing; Rührmair, Ulrich; Narayana, Spoorthy; Sharif, Uzair; Schlichtmann, Ulf: MWA Skew SRAM Based SIMPL Systems for Public-Key Physical Cryptography. Proceedings of the 8th International Conference on Trust & Trustworthy Computing (TRUST 2015), 2015 mehr…BibTeX
Glocker, Elisabeth; Chen, Qingqing; Zaidi, Asheque; Schlichtmann, Ulf; Schmitt-Landsiedel, Doris: Emulation of an ASIC Power and Temperature Monitor System for FPGA Prototyping. Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015), 2015 mehr…BibTeX
Greim, Marc; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: C++ Processor Models for Accelerated Multi-level Error Effect Simulation. edaWorkshop, 2015 mehr…BibTeX
Jassi, Munish; Bordes, Benjamin; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Automation of FPGA Performance Monitoring and Debugging Using IP-XACT and Graph-Grammars. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2015 mehr…BibTeX
Jassi, Munish; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: GRIP: Grammar-Based IP Integration and Packaging for Acceleration-Rich SoC Designs. ACM/IEEE Design Automation Conference (DAC), 2015 mehr…BibTeX
Kumar, Rohit; Li, Bing; Shen, Yiren; Schlichtmann, Ulf; Hu, Jiang: Timing Verification for Adaptive Integrated Circuits. Design, Automation and Test in Europe (DATE), 2015 mehr…BibTeX
Li, Bing; Schlichtmann, Ulf: Evaluation of circuit performance and configuration reduction considering post-silicon clock skew tuning. edaWorkshop, 2015 mehr…BibTeX
Mueller-Gritschneder, Daniel: VHDL Code Generation from IP-Xact using the Eclipse Modeling Framework (EMF). Design and Verification Conference and Exhibition (DVCon) Tutorials, 2015 mehr…BibTeX
Schlichtmann, Ulf: Beyond GORDIAN and Kraftwerk: EDA Research at TUM. International Symposium on Physical Design (ISPD’15), 2015 mehr…BibTeX
Sousa, Ericles; Hannig, Frank; Teich, Jürgen; Chen, Qingqing; Schlichtmann, Ulf: Runtime Adaptation of Application Execution under Thermal and Power Constraints in Massively Parallel Processor Arrays. Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2015), 2015 mehr…BibTeX
Wu, Chia-Yu; Graeb, Helmut; Hu, Jiang: A Pre-search Assisted ILP Approach to Analog Integrated Circuit Routing. IEEE International Conference on Computer Design (ICCD), 2015 mehr…BibTeX
Zwerger, Michael; Graeb, Helmut: Detection of Asymmetric Aging-Critical Voltage Conditions in Analog Power-Down Mode. Design, Automation and Test in Europe (DATE), 2015 mehr…BibTeX
Zwerger, Michael; Neuner, Maximilian; Graeb, Helmut: Power-Down Circuit Synthesis for Analog/Mixed-Signal. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2015 mehr…BibTeX
Zwerger, Michael; Vlachas, Pantelis-Rafail; Graeb, Helmut: A Fast Analytical Approach for Static Power-Down Mode Analysis. IEEE International Conference on Electronics, Circuits, & Systems (ICECS), 2015 mehr…BibTeX
Barke, Martin; Kaergel, Michael; Olbrich, Markus; Schlichtmann, Ulf: Robustness Measurement of Integrated Circuits and its Adaptation to Aging Effects. Microelectronics Reliability 54 (6-7), 2014, 1058-1065 mehr…BibTeX
Glocker, Elisabeth; Boppu, Srinivas; Chen, Qingqing; Schlichtmann, Ulf; Teich, Jürgen; Schmitt-Landsiedel, Doris: Temperature Modeling and Emulation of an ASIC Temperature Monitor System for Tightly-Coupled Processor Arrays (TCPAs). Advances in Radio Science 12, 2014, 103--109 mehr…BibTeX
Kleeberger, Veit B.; Barke, Martin; Werner, Christoph; Schmitt-Landsiedel, Doris; Schlichtmann, Ulf: A Compact Model for NBTI Degradation and Recovery under Use-Profile Variations and its Application to Aging Analysis of Digital Integrated Circuits. Microelectronics Reliability 54 (6-7), 2014, 1083-1089 mehr…BibTeX
Linder, Michael; Eder, Alfred; Oberländer, Klaus; Schlichtmann, Ulf: An Analysis of Industrial SRAM Test ResultsA Comprehensive Study on Effectiveness and Classification of March Test Algorithms. IEEE Design and Test, 2014 mehr…BibTeX
Lorenz, Dominik; Barke, Martin; Schlichtmann, Ulf: Monitoring of Aging in Integrated Circuits by Identifying Possible Critical Paths. Microelectronics Reliability 54 (6-7), 2014, 1075-1082 mehr…BibTeX
Todorov, Vladimir; Mueller-Gritschneder, Daniel; Reinig, Helmut; Schlichtmann, Ulf: Deterministic Synthesis of Hybrid Application-Specific Network-on-Chip Topologies. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on 33 (10), 2014, 1503-1516 mehr…BibTeX
Konferenzbeiträge / Poster
Boos, Anja; Ramini, Luca; Bertozzi, Davide; Schlichtmann, Ulf: Ein Platzier- und Verdrahtungsalgorithmus für Optische Networks-on-Chip zur Minimierung der Einfügedämpfung. edaWorkshop, 2014 mehr…BibTeX
Chou, Pang-Yen; Graeb, Helmut: Platzierung von Kapazitäts-Arrays: ein konstruktiver Ansatz. edaWorkshop, 2014 mehr…BibTeX
Glocker, Elisabeth; Chen, Qingqing; Zaidi, Asheque M.; Schlichtmann, Ulf; Schmitt-Landsiedel, Doris: Emulated ASIC Power and Temperature Monitor System for FPGA Prototyping of an Invasive MPSoC Computing Architecture. Proceedings of the 1st Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing 2014), 2014 mehr…BibTeX
Glocker, Elisabeth; Chen, Qingqing; Zaidi, Asheque; Schlichtmann, Ulf; Schmitt-Landsiedel, Doris: Emulierung eines ASIC-Leistungsverbrauchs- und Temperaturmonitorsystems für FPGA-Prototyping eines ressourcengewahren Computersystems. 16. Workshop Analogschaltungen, 2014 mehr…BibTeX
Goswami, Dip; Mueller-Gritschneder, Daniel; Twan, Basten; Schlichtmann, Ulf; Chakraborty, Samarjit: Fault-tolerant Embedded Control Systems for Unreliable Hardware. International Symposium on Integrated Circuits (ISIC), 2014 mehr…BibTeX
Kleeberger, Veit B.; Dorfner, Magdalena; Schlichtmann, Ulf: Evaluation of Sequential Circuit Resilience in Early Design Stages. edaWorkshop, 2014 mehr…BibTeX
Kleeberger, Veit B.; Maier, Petra R.; Schlichtmann, Ulf: Workload- and Instruction-Aware Timing Analysis - The missing Link between Technology and System-level Resilience. ACM/IEEE Design Automation Conference (DAC), 2014 mehr…BibTeX
Miller, Felix; Todorov, Vladimir; Wild, Thomas; Mueller-Gritschneder, Daniel; Herkersdorf, Andreas; Schlichtmann, Ulf: A TSV-Property-aware Synthesis Method for Application-Specific 3D-NoCs Design. Design Automation and Test in Europe (DATE), Friday Workshop on 3D Integration, 2014 mehr…BibTeX
Mueller-Gritschneder, Daniel; Maier, Petra R.; Greim, Marc; Schlichtmann, Ulf: SystemC-based Multi-level Error Injection for the Evaluation of Fault-tolerant Systems. International Symposium on Integrated Circuits (ISIC), 2014 mehr…BibTeX
Oetjens, J. H.; Bannow, N.; Becker, M.; Bringmann, Oliver; Burger, A.; Chaari, Moomen; Chakraborty, Samarjit; Drechsler, Rolf; Ecker, Wolfgang; Gr, K.; Kruse, Th.; Kuznik, C.; Le, H. M.; Mauderer, A.; M, W.; Mueller-Gritschneder, Daniel; Poppen, F.; Post, H.; Reiter, S.; Rosenstiel, Wolfgang; Roth, S.; Schlichtmann, Ulf; Schwerin, A. von; Tabacaru, B. A.; Viehl, Alexander: Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference (DAC '14), ACM, 2014 mehr…BibTeX
Pehl, Michael; Punnakkal, Akshara Ranjit; Hiller, Matthias; Graeb, Helmut: Advanced Performance Metrics for Physical Unclonable Functions. International Symposium on Integrated Circuits (ISIC), 2014 mehr…BibTeX
Schlichtmann, Ulf; Kleeberger, Veit B.; Abraham, Jacob A.; Evans, Adrian; Gimmler-Dumont, Christina; Glaß, Michael; Herkersdorf, Andreas; Nassif, Sani R.; Wehn, Norbert: Connecting Different Worlds Technology Abstraction for Reliability-Aware Design and Test. Design, Automation and Test in Europe (DATE), 2014 mehr…BibTeX
Sonstiges
Anja Boos, Luca Ramini, Davide Bertozzi, Ulf Schlichtmann: A Placement and Routing Algorithm for Optical Networks-on-Chip. Lehrstuhl für Entwurfsautomatisierung, 2014, mehr…BibTeX
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Kayed Ghattas: Assigning Ranges of Post-Silicon Tunable Buffers and Efficient Test for Yield Improvement. INTERNSHIP REPORT, 2014 mehr…BibTeX
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Kayed Ghattas: Assigning Ranges of Post-Silicon Tunable Buffers and Efficient Test for Yield Improvement. Projektarbeit, 2014 mehr…BibTeX
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Ulrich Rührmair, Xiaolin Xu, Jan Sölter, Ahmed Mahmoud, Mehrdad Majzoobi, Farinaz Koushanfar, Wayne Burleson: Efficient Power and Timing Side Channels on PUFs. Technische Universität München, 2014, mehr…BibTeX
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2013
Bücher / Beiträge zu Sammelbänden
Eick, Michael; Graeb, Helmut: Towards Automatic Structural Analysis of Mixed-Signal Circuits – 1. In: Fakhfakh, Mourad; Tlelo-Cuautle, Esteban; Castro-Lopez, Rafael (Hrsg.): Analog/RF and Mixed-Signal Circuit Systematic Design. Springer, 2013 mehr…BibTeX
Zeitschriftenartikel
Glocker, Elisabeth; Boppu, Srinivas; Chen, Qingqing; Schlichtmann, Ulf; Teich, Jürgen; Schmitt-Landsiedel, Doris: Temperature Modeling and Emulation of an ASIC Temperature Monitor System for Tightly-Coupled Processor Arrays (TCPAs). Advances in Radio Science, 2013 mehr…BibTeX
Kleeberger, Veit B.; Gimmler-Dumont, Christina; Weis, Christian; Herkersdorf, Andreas; Mueller-Gritschneder, Daniel; Nassif, Sani R.; Schlichtmann, Ulf; Wehn, Norbert: A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. IEEE Micro 33 (4), 2013 mehr…BibTeX
Kleeberger, Veit B.; Maier, Petra; Schlichtmann, Ulf: Ein stochastisches Modell zur Beschreibung von Signalen in digitalen Schaltungen basierend auf quadratischer Optimierung. Advances in Radio Science 11, 2013 mehr…BibTeX
Li, Bing; Chen, Ning; Xu, Yang; Schlichtmann, Ulf: On Timing Model Extraction and Hierarchical Statistical Timing Analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 32 (3), 2013, 367-380 mehr…BibTeX
Uphoff, Carsten; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Application of Dempster-Shafer Theory to Task Mapping under Epistemic Uncertainty. 2013 IEEE International Systems Conference, 2013 mehr…BibTeX
Zwerger, Michael; Graeb, Helmut: Verification of the power-down mode of analog circuits by structural voltage propagation. Analog Integrated Circuits and Signal Processing, 2013 mehr…BibTeX
Konferenzbeiträge / Poster
Barke, Martin; Kleeberger, Veit B.; Werner, Christoph; Schmitt-Landsiedel, Doris; Schlichtmann, Ulf: Analysis of Aging Mitigation Techniques for Digital Circuits Considering Recovery Effects. edaWorkshop, 2013 mehr…BibTeX
Boos, Anja; Ramini, Luca; Schlichtmann, Ulf; Bertozzi, Davide: PROTON: An Automatic Place-and-Route Tool for Optical Networks-on-Chip. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2013 mehr…BibTeX
Georgakos, Georg; Schlichtmann, Ulf; Schneider, Reinhard; Chakraborty, Samarjit: Reliability Challenges for Electric Vehicles: From Devices to Architecture and Systems Software. ACM/IEEE Design Automation Conference (DAC), 2013 mehr…BibTeX
Habal, Husni; Graeb, Helmut: Evaluating Analog Circuit Performance in Light of MOSFET Aging at Different Time Scales. International Conference on IC Design and Technology, 2013 mehr…BibTeX
Habal, Husni; Graeb, Helmut: Analyse analoger Schaltungseigenschaften bei Kurz- und Langzeitalterungseffekten. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, 2013 mehr…BibTeX
Herkersdorf, Andreas; Engel, Michael; Glaß, Michael; Henkel, Jörg; Kleeberger, Veit B.; Kochte, Michael A.; Kühn, Johannes M.; Nassif, Sani R.; Rauchfuss, Holm; Rosenstiel, Wolfgang; Schlichtmann, Ulf; Shafique, Muhammad; Tahoori, Mehdi B.; Teich, Jürgen; Wehn, Norbert; Weis, Christian; Wunderlich, Hans-Joachim: Cross-Layer Dependability Modeling and Abstraction in Systems on Chip. Workshop on Silicon Errors in Logic - System Effects (SELSE), 2013 mehr…BibTeX
Kleeberger, Veit B.; Graeb, Helmut; Schlichtmann, Ulf: Predicting Future Product Performance: Modeling and Evaluation of Standard Cells in FinFET Technologies. ACM/IEEE Design Automation Conference (DAC), 2013 mehr…BibTeX
Kleeberger, Veit B.; Graeb, Helmut; Schlichtmann, Ulf: Modellierung und Evaluierung von Standardzellen in FinFET-Technologie. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, 2013 mehr…BibTeX
Kleeberger, Veit B.; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Technology-Aware System Failure Analysis in the Presence of Soft Errors by Mixture Importance Sampling. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013 mehr…BibTeX
Lange, André; Jancke, Roland; Haase, Joachim; Lorenz, Ingolf; Schlichtmann, Ulf: Probabilistic Standard Cell Modeling Considering Non-Gaussian Parameters and Correlations. ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2013to appearmehr…BibTeX
Lu, Kun; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Memory Access Reconstruction Based on Memory Allocation Mechanism for Source-Level Simulation of Embedded Software. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2013 mehr…BibTeX
Lu, Kun; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Fast Cache Simulation for Host-Compiled Simulation of Embedded Software. Design, Automation and Test in Europe (DATE), 2013 mehr…BibTeX
Lu, Kun; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Analytical Timing Estimation for Temporally Decoupled TLMs Considering Resource Conflicts. Design, Automation and Test in Europe (DATE), 2013 mehr…BibTeX
Mueller-Gritschneder, Daniel; Lu, Kun; Wallander, Erik; Greim, Marc; Schlichtmann, Ulf: A Virtual Prototyping Platform for Real-time Systems with a Case Study for a Two-wheeled Robot. Design, Automation and Test in Europe (DATE), 2013 mehr…BibTeX
Todorov, Vladimir; Mueller-Gritschneder, Daniel; Reinig, Helmut; Schlichtmann, Ulf: A Spectral Clustering Approach to Application-Specific Network-on-Chip Synthesis. Design, Automation and Test in Europe (DATE), 2013 mehr…BibTeX
Tseng, Tsun-Ming; Li, Bing; Ho, Tsung-Yi; Schlichtmann, Ulf: Iterative Refinement of Dense Meander Segments in High-speed Printed Circuit Boards. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, 2013 mehr…BibTeX
Tseng, Tsun-Ming; Li, Bing; Ho, Tsung-Yi; Schlichtmann, Ulf: Post-Route Refinement for High-Frequency PCBs Considering Meander Segment Alleviation. ACM Great Lake Symposium on VLSI (GLSVLSI), 2013 mehr…BibTeX
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Tseng, Tsun-Ming; Li, Bing; Ho, Tsung-Yi; Schlichtmann, Ulf: Post-Route Alleviation of Dense Meander Segments in High-Performance Printed Circuit Boards. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2013 mehr…BibTeX
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Verma, Amit; Multani, Pritpal; Mueller-Gritschneder, Daniel; Todorov, Vladimir; Schlichtmann, Ulf: A Greedy Approach for Latency-bounded Deadlock-free Routing Path Allocation for Application-specific NoCs. International Symposium on Networks-on-Chip (NOCS), 2013 mehr…BibTeX
Sonstiges
Eick, Michael; Sridharan, Devanathan; Graeb, Helmut: Symmetry Computation for Hierarchical Analog Designs. Poster at FAC Workshop 2013, 2013 mehr…BibTeX
2012
Bücher / Beiträge zu Sammelbänden
Graeb, Helmut: From Sizing over Design Centering and Pareto Optimization to Tolerance Pareto Optimization of Electronic Circuits. In: Michielsen, B.; Poirier, J.-R. (Hrsg.): Mathematics in Industry 16. Springer, 2012, 35--38 mehr…BibTeX
Knoth, Christoph; Schlichtmann, Ulf: Characterization of Standard Cells – 4.1. In: Dietrich, Manfred; Haase, Joachim (Hrsg.): Process Variations and Probabilistic Integrated Circuit Design. Springer (first. Aufl.), 2012, 93-106 mehr…BibTeX
Li, Bing; Schlichtmann, Ulf: Mathematical Modeling of Process Variations – 3.3. In: Dietrich, Manfred; Haase, Joachim (Hrsg.): Process Variations and Probabilistic Integrated Circuit Design. Springer, 2012, 81-88 mehr…BibTeX
Li, Bing; Schlichtmann, Ulf: Statistical Static Timing Analysis – 4.3. In: Dietrich, Manfred; Haase, Joachim (Hrsg.): Process Variations and Probabilistic Integrated Circuit Design. Springer, 2012, 117-126 mehr…BibTeX
Zeitschriftenartikel
Chen, Ning; Li, Bing; Schlichtmann, Ulf: Iterative Timing Analysis Based on Nonlinear and Interdependent Flipflop Modelling. IET Circuits, Devices & Systems, 2012 mehr…BibTeX
Eick, Michael; Graeb, Helmut: MARS: Matching-driven Analog Sizing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2012 mehr…BibTeX
Li, Bing; Chen, Ning; Schlichtmann, Ulf: Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 31 (11), 2012, 1670-1683 mehr…BibTeX
Lorenz, Dominik; Barke, Martin; Schlichtmann, Ulf: Efficiently analyzing the impact of aging effects on large integrated circuits. Microelectronics Reliability 52 (8), 2012, 1546-1552 mehr…BibTeX
Pan, Xin; Graeb, Helmut: Reliability Optimization of Analog Integrated Circuits Considering the Trade-off between Lifetime and Area. Microelectronics Reliability 52 (8), 2012, 1559-1564 mehr…BibTeX
Pehl, Michael; Graeb, Helmut: Tolerance Design of Analog Circuits Using a Branch-and-Bound Based Approach. Journal of Circuits, Systems, and Computers, 2012 mehr…BibTeX
Konferenzbeiträge / Poster
Barke, Martin; Kärgel, Michael; Lu, Weiyun; Salfelder, Felix; Hedrich, Lars; Olbrich, Markus; Radetzki, Martin; Schlichtmann, Ulf: Robustness Validation of Integrated Circuits and Systems. Asia Symposium on Quality Electronic Design (ASQED), 2012 mehr…BibTeX
Chen, Qingqing; Csaba, György; Lugli, Paolo; Schlichtmann, Ulf; Rührmair, Ulrich: Characterization of the Bistable Ring PUF. Design, Automation and Test in Europe (DATE), 2012 mehr…BibTeX
Eick, Michael; Graeb, Helmut: Automatische Dimensionierung von Analogschaltungen unter Berücksichtigung von Schaltungssysmmetrien. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, 2012 mehr…BibTeX
Eick, Michael; Graeb, Helmut: A Versatile Structural Analysis Method for Analog, Digital and Mixed-Signal Circuits. Int. Conf. Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012 mehr…BibTeX
Graeb, Helmut: ITRS 2011 Analog EDA Challenges and Approaches. Design, Automation and Test in Europe (DATE), 2012 mehr…BibTeX
Knoth, Christoph; Jedda, Hela; Schlichtmann, Ulf: Current Source Modeling for Power and Timing Analysis at Different Supply Voltages. Design, Automation and Test in Europe (DATE), 2012 mehr…BibTeX
Lu, Kun; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Accurately Timed Transaction Level Models for Virtual Prototyping at High Abstraction Level. Design, Automation and Test in Europe (DATE), 2012 mehr…BibTeX
Lu, Kun; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Hierarchical Control Flow Matching for Source-level Simulation of Embedded Software. IEEE International Symposium on System-on-Chip, 2012 mehr…BibTeX
Masrur, Alejandro; Kindt, Philipp; Becker, Martin; Chakraborty, Samarjit; Kleeberger, Veit B.; Barke, Martin; Schlichtmann, Ulf: Schedulability Analysis for Processors with Aging-Aware Autonomic Frequency Scaling. International Conference on Embedded and Real-Time Computing Systems and Applications, 2012 mehr…BibTeX
Meiners, Mirco; Sommer, Ralf; Graeb, Helmut: Schematic Driven MEMS Design. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012 mehr…BibTeX
Nassif, Sani R.; Kleeberger, Veit B.; Schlichtmann, Ulf: Goldilocks failures: not too soft, not too hard. IEEE International Reliability Physics Symposium (IRPS), 2012 mehr…BibTeX
Todorov, Vladimir; Ghiribaldi, Alberto; Reinig, Helmut; Bertozzi, Davide; Schlichtmann, Ulf: Non-intrusive trace & debug noc architecture with accurate timestamping for GALS SoCs. International Conference on Hardware/Software Co-design and System Synthesis (CODES+ISSS), ACM, 2012 mehr…BibTeX
Todorov, Vladimir; Mueller-Gritschneder, Daniel; Reinig, Helmut; Schlichtmann, Ulf: Automated Construction of a Cycle-Approximate Transaction Level Model of a Memory Controller. Design, Automation and Test in Europe (DATE), 2012 mehr…BibTeX
Xu, Yang; Li, Bing; Hasholzner, Ralph; Rohfleisch, Bernhard; Haubelt, Christian; Teich, Jürgen: Variation-Aware Leakage Power Model Extraction for System-Level Hierarchical Power Analysis. Design, Automation and Test in Europe (DATE), 2012 mehr…BibTeX
Zwerger, Michael; Graeb, Helmut: Short-Circuit-Path and Floating-Node Verification of Analog Circuits in Power-Down Mode. Int. Conf. Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012 mehr…BibTeX
Zwerger, Michael; Graeb, Helmut: Verifikation des Power-Down-Modus von analogen Schaltungen. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, 2012 mehr…BibTeX
Veit B. Kleeberger, Martin Barke, Christoph Werner, Doris Schmitt-Landsiedel and Ulf Schlichtmann: Aging Aware Timing Analysis of Digital Integrated Circuits for Varying Use Profiles. Lehrstuhl für Entwurfsautomatisierung, 2012, mehr…BibTeX
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2011
Bücher / Beiträge zu Sammelbänden
Graeb, Helmut: Analog Layout Synthesis - A Survey of Topological Approaches. Springer, 2011 mehr…BibTeX
Pan, Xin; Graeb, Helmut: Lifetime Yield Optimization of Analog Circuits Considering Process Variations and Parameter Degradations – 6. In: Tlelo-Cuautle, Esteban (Hrsg.): Advances in Analog Circuits. InTech, 2011, 131-146 mehr…BibTeX
Pehl, Michael; Graeb, Helmut: An SQP and Branch-and-Bound Based Approach for Discrete Sizing of Analog Circuits – 13. In: Tlelo-Cuautle, Esteban (Hrsg.): Advances in Analog Circuits. InTech, 2011, 297-316 mehr…BibTeX
Strasser, Martin; Eick, Michael; Graeb, Helmut; Schlichtmann, Ulf: Deterministic Analog Placement by Enhanced Shape Functions – 3. In: Graeb, Helmut (Hrsg.): Analog Layout Synthesis. Springer, 2011, 95--145 mehr…BibTeX
Zeitschriftenartikel
Chen, Qingqing; Csaba, György; Lugli, Paolo; Schlichtmann, Ulf; Stutzmann, Martin; Rührmair, Ulrich: Circuit-Based Approaches to SIMPL Systems. Journal of Circuits, Systems, and Computers 20 (1), 2011, 1-17 mehr…BibTeX
Eick, Michael; Strasser, Martin; Lu, Kun; Schlichtmann, Ulf; Graeb, Helmut: Comprehensive Generation of Hierarchical Placement Rules for Analog Integrated Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 30 (2), 2011, 180-193 mehr…BibTeX
Habal, Husni; Graeb, Helmut: Constraint-Based Layout-Driven Sizing of Analog Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 30 (8), 2011, 1089,1102 mehr…BibTeX
Kleeberger, Veit Benedikt; Schlichtmann, Ulf: Zuverlässigkeit digitaler Schaltungen unter Einfluss von intrinsischem Rauschen. Advances in Radio Science 9, 2011 mehr…BibTeX
Konferenzbeiträge / Poster
Chen, Ning; Li, Bing; Schlichtmann, Ulf: Timing Modeling of Flipflops Considering Aging Effects. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (Lecture Notes in Computer Science), 2011 mehr…BibTeX
Chen, Ning; Li, Bing; Schlichtmann, Ulf: Iterative Timing Analysis Considering Interdependency of Setup and Hold Times. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (Lecture Notes in Computer Science), 2011 mehr…BibTeX
Chen, Qingqing; Csaba, György; Lugli, Paolo; Schlichtmann, Ulf; Rührmair, Ulrich: The Bistable Ring PUF: A New Architecture for Strong Physical Unclonable Functions. IEEE Int. Symposium on Hardware-Oriented Security and Trust, 2011 mehr…BibTeX
Henkel, Jörg; Bauer, Lars; Becker, Joachim; Bringmann, Oliver; Brinkschulte, Uwe; Chakraborty, Samarjit; Engel, Michael; Ernst, Rolf; Härtig, Hermann; Hedrich, Lars; Herkersdorf, Andreas; Kapitza, Rüdiger; Lohmann, Daniel; Marwedel, Peter; Platzner, Marco; Rosenstiel, Wolfgang; Schlichtmann, Ulf; Spinczyk, Olaf; Tahoori, Mehdi; Teich, Jürgen; Wehn, Norbert; Wunderlich, Hans Joachim: Design and Architectures for Dependable Embedded Systems. International Conference on Hardware/Software Co-design and System Synthesis (CODES+ISSS), 2011 mehr…BibTeX
Kleeberger, Veit Benedikt; Schlichtmann, Ulf: Reliability Analysis of Digital Circuits Considering Intrinsic Noise. Asia Symposium on Quality Electronic Design (ASQED), 2011 mehr…BibTeX
Knoth, Christoph; Uphoff, Carsten; Kiesel, Sebastian; Schlichtmann, Ulf: SWAT: Simulator for Waveform-Accurate Timing including Parameter Variations and Transistor Aging. Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation (PATMOS), Springer, 2011 mehr…BibTeX
Li, Bing; Chen, Ning; Schlichtmann, Ulf: Fast Statistical Timing Analysis for Circuits with Post-Silicon Tunable Clock Buffers. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2011 mehr…BibTeX
Lu, Kun; Mueller-Gritschneder, Daniel; Ecker, Wolfgang; Esen, Volkan; Velten, Michael; Schlichtmann, Ulf: An Approach toward Accurately Timed TLM+ for Embedded System Models. edaWorkshop, 2011 mehr…BibTeX
Lu, Kun; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Removal of Unnecessary Context Switches from the SystemC Simulation Kernel for Fast VP Simulation. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2011 mehr…BibTeX
Mueller-Gritschneder, Daniel; Lu, Kun; Schlichtmann, Ulf: Control-flow-driven Source Level Timing Annotation for Embedded Software Models on Transaction Level. EUROMICRO Conference on Digital System Design (DSD), 2011 mehr…BibTeX
Pan, Xin; Graeb, Helmut: Reliability Optimization of Analog Circuits with Aged Sizing Rules and Area Trade-off. edaWorkshop, VDE Verlag GmbH, 2011 mehr…BibTeX
Pehl, Michael; Zwerger, Michael; Graeb, Helmut: Variability-Aware Automated Sizing of Analog Circuits Considering Discrete Design Parameters. International Symposium on Integrated Circuits (ISIC), 2011 mehr…BibTeX
Wang, Zhonglei; Lu, Kun; Herkersdorf, Andreas: An Approach to Improve Accuracy of Source-Level TLMs of Embedded Software. Design, Automation and Test in Europe (DATE), 2011 mehr…BibTeX
Sonstiges
Eick, Michael; Graeb, Helmut: Sizing of Analog Integrated Circuits using Enhanced Symmetry Analysis. Lehrstuhl für Entwurfsautomatisierung, 2011, mehr…BibTeX
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Eick, Michael; Graeb, Helmut: Unified Generation of Analog Sizing and Placement Constraints. Talk, 2011 mehr…BibTeX
2010
Bücher / Beiträge zu Sammelbänden
Strasser, Martin; Eick, Michael; Graeb, Helmut; Schlichtmann, Ulf: Deterministic Analog Placement by Enhanced Shape Functions – 3. In: Graeb, Helmut (Hrsg.): Analog Layout Synthesis. Springer, 2010, 95-146 mehr…BibTeX
Lorenz, Dominik; Georgakos, Georg; Schlichtmann, Ulf: Aging-aware Timing Analysis of Combinatorial Circuits on Gate Level. it - Information Technology 4, 2010 mehr…BibTeX
Konferenzbeiträge / Poster
Csaba, Gyorgy; Ju, Xueming; Ma, Zhiqian; Chen, Qingqing; Porod, Wolfgang; Schmidhuber, Jürgen; Schlichtmann, Ulf; Lugli, Paolo; Rührmair, Ulrich: Application of mismatched cellular nonlinear networks for physical cryptography. IEEE International Workshop on Cellular Nanoscale Networks and their Applications, 2010 mehr…BibTeX
Eick, Michael; Strasser, Martin; Graeb, Helmut; Schlichtmann, Ulf: Automatic Generation of Hierarchical Placement Rules for Analog Integrated Circuits. ACM/SIGDA International Symposium on Physical Design (ISPD), 2010, 47-54 mehr…BibTeX
Graeb, Helmut: From Sizing over Design Centering and Pareto Optimization to Tolerance Pareto Optimization of Electronic Circuits. Int. Conf. on Scientific Computing in Electrical Engineering (SCEE), 2010, 109-110 mehr…BibTeX
Habal, Husni; Graeb, Helmut: Accurate Analog Circuit Optimization with Layout Synthesis and Parasitic Extraction. Design, Automation and Test in Europe (DATE) University Booth, 2010 mehr…BibTeX
Knoth, Christoph; Eichwald, Irina; Nordholz, Petra; Schlichtmann, Ulf: White-Box Current Source Modeling Including Parameter Variation and Its Application in Timing Simulation. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2010, 200-210 mehr…BibTeX
Li, Bing; Chen, Ning; Schlichtmann, Ulf: Fast Statistical Timing Analysis of Latch-Controlled Circuits for Arbitrary Clock Periods. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2010, 524-531 mehr…BibTeX
Lorenz, Dominik; Barke, Martin; Mueller-Gritschneder, Daniel; Georgakos, Georg; Schlichtmann, Ulf: Aging model for timing analysis at register-transfer-level. ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2010 mehr…BibTeX
Lorenz, Dominik; Barke, Martin; Schlichtmann, Ulf: Aging analysis at gate and macro cell level. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2010, 77--84 mehr…BibTeX
Lorenz, Dominik; Barke, Martin; Schlichtmann, Ulf: Timing-Modell für Makrozellen zur Alterungsanalyse. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, 2010, 41--47 mehr…BibTeX
Mueller-Gritschneder, Daniel; Graeb, Helmut: Computation of Yield-optimized Pareto Fronts for Analog Integrated Circuit Specifications. Design, Automation and Test in Europe (DATE), 2010 mehr…BibTeX
Mueller-Gritschneder, Daniel; Graeb, Helmut: Berechnung von ausbeuteoptimierten Spezifikationsparetofronten für analoge integrierte Schaltungen. ITG/GMM-Fachtagung Entwurf von analogen Schaltungen mit CAE-Methoden (ANALOG), 2010 mehr…BibTeX
Pan, Xin; Graeb, Helmut: Reliability Analysis of Analog Circuits by Lifetime Yield Prediction Using Worst-Case Distance Degradation Rate. IEEE International Symposium on Quality Electronic Design (ISQED), 2010 mehr…BibTeX
Pan, Xin; Graeb, Helmut: Lifetime Yield Optimization: Towards a Robust Analog Design for Reliability. Design, Automation and Test in Europe (DATE) University Booth, 2010 mehr…BibTeX
Pan, Xin; Graeb, Helmut: Reliability Analysis of Analog Circuits Using Quadratic Lifetime Worst-Case Distance Prediction. IEEE Custom Integrated Circuits Conference (CICC), 2010 mehr…BibTeX
Pehl, Michael; Graeb, Helmut: Dimensionierung Analoger Schaltungen mit diskreten Parametern unter Verwendung eines Zufalls- und Gradientenbasierten Ansatzes. ITG/GMM-Fachtagung Entwurf von analogen Schaltungen mit CAE-Methoden (ANALOG), 2010 mehr…BibTeX
Pehl, Michael; Zwerger, Michael; Graeb, Helmut: Sizing Analog Circuits Using an SQP and Branch and Bound Based Approach. IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2010 mehr…BibTeX
Radetzki, Martin; Bringmann, Oliver; Nebel, Wolfgang; Olbrich, Markus; Salfelder, Felix; Schlichtmann, Ulf: Robustheit nanoelektronischer Schaltungen und Systeme. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, Zuverlässigkeit und Entwurf, 4. GMM/GI/ITG-Fachtagung, Wildbad Kreuth, 2010 mehr…BibTeX
Rührmair, Ulrich; Chen, Qingqing; Stutzmann, Martin; Lugli, Paolo; Schlichtmann, Ulf; Csaba, György: Towards Electrical, Integrated Implementations of SIMPL Systems. Workshop in Information Security Theory and Practices (WISTP) (Lecture Notes in Computer Science), 2010, 277--292 mehr…BibTeX
Strasser, Martin; Eick, Michael; Graeb, Helmut; Schlichtmann, Ulf: Zur effizienten Berücksichtigung von Mindestabständen bei analogen Platzierverfahren. ITG/GMM-Fachtagung Entwurf von analogen Schaltungen mit CAE-Methoden (ANALOG), 2010, 123-128 mehr…BibTeX
Strasser, Martin; Graeb, Helmut; Schlichtmann, Ulf: Plantage+, Fully Automated, Industrial Level Analog Layout Tool. Design, Automation and Test in Europe (DATE) University Booth, 2010 mehr…BibTeX
Sonstiges
Daniel Müller-Gritschneder, Kun Lu, Ulf Schlichtmann: An algorithm to map the control flow of binary code and source code for the automatic generation of timing annotations for TLM software models. Lehrstuhl für Entwurfsautomatisierung, (Technischer Bericht Nr.: TUM-LEA-10-2), 2010, mehr…BibTeX
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M. Eick, K. Lu, H. Graeb: Sizing of Analog Integrated Circuits using Symmetry Recognition. Lehrstuhl für Entwurfsautomatisierung, 2010, mehr…BibTeX
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2009
Zeitschriftenartikel
Graeb, Helmut; Pan, Xin: Optimierung integrierter Schaltungen im Hinblick auf Alterungseinfluesse. newsletter edacentrum, 2009, 11-14 mehr…BibTeX
Mueller-Gritschneder, Daniel; Graeb, Helmut; Schlichtmann, Ulf: A Successive Approach to Compute the Bounded Pareto Front of Practical Multi-objective Optimization Problems. SIAM Journal on optimization 20 (2), 2009, 915--934 mehr…BibTeX
Tchegho, Aurelien; Mattes, Heinz; Sattler, Sebastian; Graeb, Helmut: Analyse und Untersuchung der Quantisierungseffekte beim Goertzel-Filter. Advances in Radio Science 7, 2009, 73--81 mehr…BibTeX
Konferenzbeiträge / Poster
Avci, Engin; Strasser, Martin; Graeb, Helmut; Schlichtmann, Ulf: A Free-Shape Router for Analog and RF Applications. European Conference on Circuit Theory and Design (ECCTD), 2009 mehr…BibTeX
Barke, E.; Grabowski, D.; Graeb, Helmut; Hedrich, L.; Heinen, St.; Popp, R.; Steinhorst, S.; Wang, Y.: Formal Approaches to Analog Circuit Verification. Design, Automation and Test in Europe (DATE), 2009 mehr…BibTeX
Chen, Ning; Li, Bing; Schlichtmann, Ulf: Sensitivity Based Parameter Reduction for Statistical Analysis of Circuit Performance. IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2009 mehr…BibTeX
Chen, Qingqing; Csaba, György; Ju, Xueming; Natarajan, Srinivas Bangalore; Lugli, Paolo; Stutzmann, Martin; Schlichtmann, Ulf; Rührmair, Ulrich: Analog Circuits for Physical Cryptography. International Symposium on Integrated Circuits (ISIC), 2009 mehr…BibTeX
Graeb, Helmut; Balasa, F.; Castro-Lopez, R.; Chang, Y.-W.; Fernandez, F. V.; Lin, P.-H.; Strasser, Martin: Analog Layout Synthesis - Recent Advances in Topological Approaches. Design, Automation and Test in Europe (DATE), 2009 mehr…BibTeX
Knoth, Christoph; Kleeberger, Veit Benedikt; Chen, Ning; Nordholz, Petra; Schlichtmann, Ulf: Waveform-based Timing Analysis for Digital Circuits using Current Source Models and Model Order Reduction. edaWorkshop, VDE Verlag, 2009, 19-24 mehr…BibTeX
Knoth, Christoph; Kleeberger, Veit Benedikt; Nordholz, Petra; Schlichtmann, Ulf: Characterization and Implementation of Nonlinear Logic Cell Models for Analog Circuit Simulation. International Symposium on Integrated Circuits (ISIC), 2009 mehr…BibTeX
Knoth, Christoph; Kleeberger, Veit Benedikt; Nordholz, Petra; Schlichtmann, Ulf: Fast and Waveform Independent Characterization of Current Source Models. IEEE/VIUF International Workshop on Behavioral Modeling and Simulation (BMAS), 2009, 90-95 mehr…BibTeX
Li, Bing; Chen, Ning; Schlichtmann, Ulf: Timing Model Extraction for Sequential Circuits Considering Process Variations. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2009, 336-343 mehr…BibTeX
Li, Bing; Chen, Ning; Schmidt, Manuel; Schneider, Walter; Schlichtmann, Ulf: On Hierarchical Statistical Static Timing Analysis. Design, Automation and Test in Europe (DATE), 2009 mehr…BibTeX
Pan, Xin; Graeb, Helmut: Degradation-Aware Analog Design Flow for Lifetime Yield Analysis and Optimization. IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2009 mehr…BibTeX
Pehl, Michael; Graeb, Helmut: RaGAzi: A Random and Gradient-Based Approach to Analog Sizing for Mixed Discrete and Continuous Parameters. International Symposium on Integrated Circuits (ISIC), 2009 mehr…BibTeX
Strasser, Martin; Graeb, Helmut; Schlichtmann, Ulf: Plantage - A Deterministic Analog Placement Approach. Design, Automation and Test in Europe (DATE), 2009University Booth Handoutmehr…BibTeX
Tchegho, Aurelien; Sattler, Sebastian; Graeb, Helmut: Walshfunktionen für das Testen von Mixed-Signal Schaltungen. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, VDE Verlag GMBH, 2009 mehr…BibTeX
Tchegho, Aurelien; Sattler, Sebastian; Graeb, Helmut: Mixed-signal testing using Walsh functions. IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW), 2009, 1-8 mehr…BibTeX
Tseng, Tsun-Ming; Chao, Mango C.-T.; Lu, Chien-Pang; Lo, Chen-Hsing: Power-Switch Routing for Coarse-Grain MTCMOS Technologies. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2009 mehr…BibTeX
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2008
Zeitschriftenartikel
Massier, Tobias; Graeb, Helmut; Schlichtmann, Ulf: The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis. IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems 27 (12), 2008, 2209-2222 mehr…BibTeX
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Spindler, Peter; Schlichtmann, Ulf; Johannes, Frank M.: Kraftwerk2 - A Fast Force-Directed Quadratic Placement Approach Using an Accurate Net Model. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2008 mehr…BibTeXWWW
Konferenzbeiträge
Massier, T.; Graeb, H.; Schlichtmann, U.: Sizing Rules for Bipolar Analog Circuit Design. Design, Automation and Test in Europe, 2008Munich, 11th March 2008, 6 mehr…BibTeX
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Konferenzbeiträge / Poster
Graeb, Helmut; Mueller, Daniel; Schlichtmann, Ulf: Pareto-Optimierung analoger Schaltungen mit Parametertoleranzen. ITG/GMM-Fachtagung Entwurf von analogen Schaltungen mit CAE-Methoden (ANALOG), 2008, 2008 mehr…BibTeXWWW
Knoth, C.; Kleeberger, V.; Schmidt M.; Li, B.; Schlichtmann, U.;: Transfer System Models of Logic Gates for Waveform-based Timing Analysis. Proceedings SM^2ACD'08, 2008, 247-252 mehr…BibTeX
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Li, Bing; Knoth, Christoph; Schmidt, Manuel; Schneider, Walter; Schlichtmann, Ulf: Static Timing Model Extraction for Combinational Circuits. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Springer, 2008 mehr…BibTeXWWW
Massier, Tobias; Gräb, Helmut: Dimensionierungsregeln für analoge Bipolarschaltungen. 10. GMM/ITG Diskussionssitzung Entwurf von Analogschaltungen (ANALOG'08), VDE Verlag GmbH, 2008 mehr…BibTeXWWW
Pehl, M.; Massier, T.; Graeb, H.; Schlichtmann, U.: A Random and Pseudo-Gradient Approach for Analog Circuit Sizing with Non-Uniformly Discretized Parameters. International Conference on Computer Design 2008 (ICCD 2008), IEEE, 2008OCTOBER 12-15,2008;Resort at Squaw Creek, Lake Tahoe CA, 188-193 mehr…BibTeX
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Schmidt, Manuel; Kinzelbach, Harald; Schlichtmann, Ulf: Variational Waveform Propagation for Accurate Statistical Timing Analysis. ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2008 mehr…BibTeXWWW
Schmidt, Manuel; Kinzelbach, Harald; Schlichtmann, Ulf: Genauere Laufzeitanalyse digitaler Schaltungen durch Berücksichtigung statistischer Schwankungen der Signalformen. edaWorkshop, 2008 mehr…BibTeXWWW
Schneider, Walter; Schmidt, Manuel; Li, Bing; Schlichtmann, Ulf: A New Bounding Technique for Handling Arbitrary Correlations in Path-Based SSTA. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Springer, 2008 mehr…BibTeXWWW
Spindler, Peter; Schlichtmann, Ulf; Johannes, Frank M.: Abacus: Fast Legalization of Standard Cell Circuits with Minimal Movement. ACM/SIGDA International Symposium on Physical Design (ISPD), 2008 mehr…BibTeXWWW
Strasser, Martin; Eick, Michael; Gräb, Helmut; Johannes, Frank M.; Schlichtmann, Ulf: Ein hierarchisches Platzierungsverfahren für analoge Schaltungen. edaWorkshop, edaCentrum, 2008 mehr…BibTeXWWW
Strasser, Martin; Eick, Michael; Gräb, Helmut; Schlichtmann, Ulf; Johannes, Frank M.: Deterministic Analog Circuit Placement using Hierarchically Bounded Enumeration and Enhanced Shape Functions. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2008 mehr…BibTeXWWW
Tchegho, A.; Mattes, H.; Sattler, S.: Optimal high-resolution spectral analyzer. Design, Automation and Test in Europe (DATE), ACM, 2008 mehr…BibTeXWWW
Schmidt, Manuel; Kinzelbach, Harald; Schlichtmann, Ulf: More Accurate Statistical Timing Analysis by Considering Waveform Variations. Lehrstuhl für Entwurfsautomatisierung, 2008, mehr…BibTeXWWW
Strasser, Martin; Gräb, Helmut; Schlichtmann, Ulf; Johannes, Frank M.: Analog Circuit Placement using Hierarchically Guided Enumeration. Lehrstuhl für Entwurfsautomatisierung, 2008, mehr…BibTeXWWW
2007
Konferenzbeiträge
Mueller, D.; Graeb, H.; Schlichtmann, U.: Trade-off design of analog circuits using goal attainment and "wave front" sequential quadratic programming. Design, Automation & Test in Europe Conference & Exhibition, 2007, DATE '07, 2007Nice, 16-20 April 2007, 6 pages mehr…BibTeXWWW
