• Emrich, Karsten; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf;: A Concise, Architecture-Focused ASIP Modeling Approach for Instruction Set Simulators. Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV), 2024 mehr… BibTeX
• Emrich, Karsten; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Towards Coverage Analysis for Translating Instruction Set Simulators. RISC-V Summit Europe, 2024 mehr… BibTeXWWW
• Kappes, Johannes; Kunzelmann, Robert; Emrich, Karsten; Foik, Conrad; Mueller-Gritschneder, Daniel; Ecker, Wolfgang: Effective Processor Model Generation from Instruction Set Simulator to Hardware Design. 2023 IEEE Nordic Circuits and Systems Conference (NorCAS), IEEE, 2023 mehr… BibTeX Volltext ( DOI )
• van Kempen, Philipp; Emrich, Karsten; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf: Automated Generation of a RISC-V LLVM Toolchain for Custom MACs. RISC-V Summit Europe, 2023 mehr… BibTeXWWW
• Emrich, Karsten; Foik, Conrad; Kappes, Johannes; Prebeck, Sebastian; Mueller-Gritschneder, Daniel; Ecker, Wolfgang; Schlichtmann, Ulf: A Flexible Simulation Environment for RISC-V. RISC-V Summit Europe, 2023 mehr… BibTeXWWW
• Ecker, Wolfgang; Adelt, Peer; Müller, Wolfgang; Heckmann, Reinhold; Krstic, Milos; Herdt, Vladimir; Drechsler, Rolf; Angst, Gerhard; Wimmer, Ralf; Mauderer, Andreas; Stahl, Rafael; Emrich, Karsten; Mueller-Gritschneder, Daniel; Becker, Bernd; Scholl, Philipp; Jentzsch, Eyck; Schlamelcher, Jan; Grüttner, Kim; Bernardo, Paul Palomero; Bringmann, Oliver; Damian, Mihaela; Oppermann, Julian; Koch, Andreas; Bormann, Jörg; Partzsch, Johannes; Mayr, Christian; Kunz, Wolfgang: The Scale4Edge RISC-V Ecosystem. Design, Automation and Test in Europe (DATE), 2022 mehr… BibTeX